1. Field of the Invention
This invention relates to computer hardware technology, and more particularly, to a shared-IRQ user-defined interrupt signal handling method and system which is designed for use in conjunction with a computer platform equipped with a programmable interrupt controller, an interrupt-configurable peripheral interface, and an interrupt-nonconfigurable peripheral interface such as a PCI (Peripheral Component Interconnect) interface, for providing a user-defined interrupt signal handling function under the shared-IRQ (Interrupt ReQuest) architecture of the computer platform for the purpose of handling user-defined interrupt signals issued by peripheral devices connected to the interrupt-configurable peripheral interface.
2. Description of Related Art
Computer systems typically utilize interrupt signals for peripheral devices, such as hard disk drives, keyboards, and mouse devices, to request the CPU (Central Processing Unit) to temporarily halt its current operation and execute related interrupt handling programs to handle requests from the peripheral devices for the peripheral devices to exchange data with the CPU.
PIC (Programmable Interrupt Controller) is a PC hardware architecture developed by the Intel Corporation of USA that allows the user to define a set of interrupt signals for use by the peripheral devices connected to a computer system. In addition, IO-APIC (Input/Output Advanced Programmable Interrupt Controller) is an advanced type of PIC that is specifically designed for use on multi-processor based computer systems, such as network servers, to offer a multiplexed interrupt control function.
In practical application, in order to allow an IO-APIC chip to operate in the conventional PIC mode, it is required to connect a specified system interrupt line IRQ to a PCI (Peripheral Component Interconnect) controller. When the PCI controller receives a user-defined interrupt signal from a connected peripheral device, the PCI controller will responsively issue a corresponding PCI interrupt signal to the CPU, which causes the CPU to execute the peripheral device's driver program. On the other hand, when the IO-APIC operates in APIC mode, the required interrupt configurations should be predefined in the MP (Multi-Processor) table or ACPI (Advanced Configuration and Power Interface) table in the BIOS (Basic Input/Output System) of the computer system
In actual operation, if in PIC mode a user-defined interrupt signal share the same system interrupt line IRQ with a PCI interrupt, then since BIOS will dynamically assign system interrupt lines IRQ to the PCI peripheral interface, it would undesirably cause the driver program that is requested by the user-defined interrupt signal unable to obtain a system interrupt line IRQ. For this sake, in most network server applications with multi-processor architecture, all the user-defined interrupt signals are separately used without sharing system interrupt lines IRQ with other types of peripheral devices such as PCI peripheral devices. One drawback to this practice, however, is that the BIOS will need to respond to each user-defined interrupt signal by finding out an unused and prespecified system interrupt line IRQ, and this procedure would require the system design to be involved in complex and difficult BIOS coding.
USPTO Backgrounds
USPTO Backgrounds