(a) Field of the Invention
The present invention relates to a plasma display panel (PDP) driving device and method, and a plasma display device.
(b) Description of the Related Art
The PDP is a flat display that uses plasma generated via a gas discharge process to display characters or images, and tens to millions of pixels are provided thereon in a matrix format, depending on its size. PDPs are categorized into DC PDPs and AC PDPs, according to supplied driving voltage waveforms and discharge cell structures.
Since the DC PDPs have electrodes exposed in the discharge space, they allow the current to flow in the discharge space while the voltage is supplied, and therefore they problematically require resistors for current restriction. On the other hand, since the AC PDPs have electrodes covered by a dielectric layer, capacitances are naturally formed to restrict the current, and the electrodes are protected from ion shocks in the case of discharging. Accordingly, they have a longer lifespan than the DC PDPs.
Scan electrodes and sustain electrodes are formed in parallel on one surface of the AC PDP, and address electrodes are formed to cross the electrodes on another surface thereof. The sustain electrodes are formed with corresponding respective scan electrodes, and one of their terminals are connected in common.
One frame of the AC PDP is divided into a plurality of subfields, and each subfield includes a reset period, an address period, and a sustain period.
The reset period is for initiating the status of each discharge cell so as to facilitate the addressing operation on the discharge cell. The addressing period is for selecting turn-on/off cells and accumulating wall charges to the turn-on cells (i.e., addressed cells). The sustain period is for causing a discharge for displaying an image on the addressed cells.
In order to perform the above-noted operation, sustain pulses are alternately applied to the scan electrodes and the sustain electrodes during the sustain period, and reset waveforms and scan waveforms are applied to the scan electrodes while the sustain electrodes are biased at a constant voltage during the reset period and the address period. Therefore, a scan driving board for driving the scan electrodes and a sustain driving board for driving the sustain electrodes are separately needed, and in this case, a problem of mounting the driving boards on a chassis base is generated, and the cost increases because of the two driving boards.
Methods for combining the two driving boards into a single combined board, providing the single board on one end of the scan electrodes, and extending one end of the sustain electrodes to reach the combined board have been proposed. However, when the two driving boards are combined, the impedance component formed at the extended sustain electrodes is increased.
USPTO Backgrounds
USPTO Backgrounds