1. Field of the Invention
The invention generally relates to queue mechanisms, and in particular to controlled data storage units and corresponding methods for storing a plurality of data items.
2. Description of the Related Art
Common motherboard layouts comprise a number of hardware components including a CPU (Central Processing Unit), a northbridge, a southbridge, and system memory. The northbridge usually is a single chip in a core-logic chipset that connects the processor to the system memory and, e.g., AGP (Accelerated Graphic Port) or PCI (Peripheral Component Interface) buses. The southbridge is usually the chip in a system core-logic chipset for controlling the IDE (Integrated Drive Electronics) or EIDE (Enhanced IDE) bus, the USB (Universal Serial Bus) bus, providing plug-n-plug support, controlling a PCI-ISA (Industry Standard Architecture) bridge, managing the keyboard/mouse controller, providing power management features, and controlling other peripherals. For controlling the USB bus, southbridges often include a USB host controller. Southbridges and northbridges may also be integrated in one single chip.
In computer systems in general, and in particular in USB host controllers, data management is an important task to be dealt with. For instance there may be data of different types to be handled with, and even with data of the same type, the handling may differ dependent on the actual function to be performed. For instance, there may be data items which are to be read from or written to memory on a periodical schedule while other data items are fetched or written asynchronously. Further, there may be data which needs to be fetched immediately when being requested, while other data can be pre-fetched in advance.
All data which is fetched or pre-fetched, or which is to written into memory, is usually stored in some kind of buffers. A known concept for such buffers is that of first-in-first-out (FIFO) buffers which can be thought as being a sequence of register elements which are filled from one side and emptied from the other side. Such buffers can be considered as a queue since the data is stored to form a sequence.
Other well known storage objects are double-ended queues which can be manipulated by a variety of functions which allow items to added either at the beginning of the queue, the end of the queue or at some specific points within queue. However, such storage objects may still have the disadvantage that they are usually suitable for one data type and one kind of data scheduling only. That is, if there are data items of two types to be stored, two separate storage units need to be provided.
As an example, FIG. 1 shows the case where data are to be stored either periodically or asynchronously. For this purpose, there are two separate storage circuits 100 and 110 provided which may be first-in-first-out buffers or another kinds of queues. Two separate buffers as depicted in FIG. 1 are however disadvantageous since each buffer requires a significant amount of hardware circuitry on the integrated circuit chip. This leads to increased circuit development and manufacturing costs and further makes it more difficult to scale the circuits down to a smaller size.
USPTO Backgrounds
USPTO Backgrounds