1. Field of the Invention
The present invention relates to a NAND-type flash memory having a plurality of NAND cells.
2. Related Art
Miniaturization of NAND-type flash memories has been steadily developed. In the inspection processes at the time of manufacturing, it is indispensable, in order to secure reliability, to perform a data pattern test in the direction in which bit lines are arranged, and a data pattern test in the direction in which sense amplifiers are arranged (see Japanese Patent Laid-Open Pub. No. 10-12000). In these tests, it is necessary to input various data patterns.
Conventionally, DataIn command indicative of a data input is used to transfer all of the test pattern data to data latch circuits which are adjacent to sense amplifiers.
In such a test technique, there is a problem that it takes time to input data when performing the test on different pages in a memory cell array, since it is necessary to input data on each occasion even when the same data pattern is required.
In the case where a tester is used to perform the test, the number of pins which can be used in measurement is limited in the tester. Accordingly, in general, the tester is set in a special mode to reduce the number of pins used for one chip of a test object in order to increase the number of chips which can be measured at the same time.
In such a special mode, although the number of pins used for one chip can be reduced, many clocks are needed to input commands used in the test and to input test data patterns, by which the test time is lengthened.
In the case where a sense amplifier is arranged for each bit line, potential interference is easily caused between the bit lines since the potential on each bit line changes at the same time. Accordingly, when performing the test, it is necessary to supply, to the bit lines, data patterns corresponding to the combination of the potentials on the bit lines, by which the kinds of data patterns are increased. In the conventional techniques, there is a problem that when the kinds of data patterns are increased, it takes a considerable time only to input data, by which the test time is lengthened.
USPTO Backgrounds
USPTO Backgrounds