The present disclosure relates, in various embodiments, to thin-film transistors (TFTs) and/or other electronic devices comprising a dielectric layer. The dielectric layer is made from molecular glasses (amorphous molecular materials). Also disclosed are processes and compositions for fabricating a dielectric layer.
Organic thin-film transistors (OTFTs) can potentially be fabricated using solution-based patterning and deposition techniques, such as spin coating, solution casting, dip coating, stencil/screen printing, flexography, gravure, offset printing, ink jet-printing, micro-contact printing, and the like, or a combination of these processes. Such processes are generally simpler and more cost effective compared to the complex photolithographic processes used in fabricating silicon-based thin film transistor circuits for electronic devices. To enable the use of these solution-based processes in fabricating thin film transistor circuits, solution processable materials are therefore required.
TFTs are generally composed of, on a substrate, an electrically conductive gate electrode, source and drain electrodes, an electrically insulating gate dielectric layer which separates the gate electrode from the source and drain electrodes, and a semiconducting layer which is in contact with the gate dielectric layer and bridges the source and drain electrodes. Their performance can be determined by the field effect mobility and the current on/off ratio. High mobility and high on/off ratio are desired.
The gate dielectric layer, in particular, should be free of pinholes and possess low surface roughness (or high surface smoothness), low leakage current, a high dielectric constant, a high breakdown voltage, adhere well to the gate electrode, be stable in solution at room temperature, and offer other functionality. It should also be compatible with semiconductor materials because the interface between the dielectric layer and the organic semiconductor layer critically affects the performance of the TFT.
Most solution processable polymers used in gate dielectric layers usually have low dielectric constants and do not contain crosslinkable functional groups, so a considerable dielectric thickness is required to reduce gate leakage current to an acceptable level. As a result, the capacitance of the dielectric layer is usually low, leading to high operating voltage and low mobility.
Various polymeric materials such as polyimides (PI), poly(vinylphenol) (PVP), and poly(methyl methacrylate) (PMMA) have been studied for use in the gate dielectric layer. However, these polymeric materials have several disadvantages. For example, polymers have a high molecular weight and polydispersity. Thus, it is difficult to purify them so that they can be used as electronic grade materials. Polymers also have a wide distribution of functional groups, which can cause non-uniform crosslinking, so that the resulting dielectric layer does not have uniform properties across its surface. As a result, gate dielectric layers must generally be thick in order to prevent such operating difficulties.
It would be desirable to provide materials which can be purified to electronic grade, and are capable of being used to form a dielectric layer of reduced thickness while maintaining the desired electrical properties.
USPTO Backgrounds
USPTO Backgrounds