I. Field of the Invention
This invention pertains to semiconductor devices having improved high voltage junction terminations. More particularly, the present invention pertains to semiconductor devices having a reduced surface field and an improved high voltage junction termination for increasing the device breakdown voltage.
II. Background Art
Semiconductor devices having regions of alternate conductivity suffer breakdown when operated at high voltages. The specific voltage at breakdown is referred to as the breakdown voltage. For a given high voltage applied to a planar semiconductor device, the region of the device most susceptible to breakdown is located at the portions of the PN junctions located at the upper, major surface of the device, near the side walls and proximate the high voltage terminals. This region is most susceptible to breakdown because additional charges which accumulate on the upper, major surface result in a higher electric field at that region.
In an effort to reduce the threat of surface breakdown near a high voltage terminal in a semiconductor device, techniques have been developed to reduce the surface electric field that exists at the upper, major surface of the device between the high voltage and low voltage terminals. Such techniques are referred to as RESURF techniques and generally consist of diffusing a lightly doped region of semiconductor material between the high voltage doped region and the low voltage doped region so that the lateral diffused portions of the lightly doped region are in contact with the high and low voltage doped regions. This results in redistributing the surface electric field to reduce the strong variations of surface voltage that exist in the regions on the upper, major surface between the high and low voltage contacts. For example, for a PNP bipolar transistor with an N- substrate, having the base terminal operated at a high voltage and the collector terminal operated at a low voltage relative to the base terminal, the lightly doped P region (P-) is disposed between and in contact with the collector and base doped regions. This establishes a gradient or uniform distribution of the electric field that is present on the upper, major surface of the device thereby increasing the surface breakdown voltage.
Such a RESURF technique, as described above, is disclosed in U.S. Pat. No. 4,605,948 issued to Martinelli, which discloses an NPN bipolar transistor having a P- supplementary region disposed between and in contact with the high voltage and low voltage doped regions. A drawback of the Martinelli device is that the surface area along the upper, major surface, between the high and low voltage doped regions, i.e. the junction termination extension region, has a significant width (between 200-400 .mu.m) and, therefore, occupies a substantial portion of the upper, major surface of the device. It is, therefore, desirable to have a high voltage semiconductor device with a high surface breakdown voltage and a reduced junction extension region.
Accordingly, it is an object of this invention to provide a semiconductor device having a reduced surface field for increasing the surface breakdown voltage.
Another object of the invention is to maintain a high breakdown voltage with a reduced junction extension region.
It is yet another object of the present invention to provide a semiconductor device having an increased surface breakdown voltage with a reduced junction termination extension region and having increased stability and reliability over prior art high voltage semiconductor devices which employ presently known RESURF techniques.
Other objects as well as additional details of the present invention will become apparent from the following detailed description and annexed drawings of the presently preferred embodiment thereof.
USPTO Backgrounds
USPTO Backgrounds