There have been barrel-shifters of this kind, for example, that disclosed in the Japanese Patent Laid-Open Publication No. 60-236197.
As described in the above reference, the barrel-shifter is a circuit for shifting input data over by desired digits at a time in response to the input data at need, and examples of arrangement thereof are shown in FIGS. 13 to 16.
FIG. 13 is a block diagram exemplifying an arrangement of a conventional right shift 4-bit barrel-shifter.
The right shift 4-bit barrel-shifter comprises four-staged barrel-shifter unit circuits (bit slice) 10 to 13 each having a data length of 4 bits which are connected to one another at each input/output terminal (referred to as an i/o terminal hereinafter) thereof by way of data lines 15. Each of barrel-shifter unit circuits 10 to 13 is designed to be set in shifting amount thereof depending to the address signal produced by a decoder 20.
FIG. 14 is a circuit diagram showing an example of arrangement of each of the barrel-shifter unit circuits 10 to 13 having a data length of 4 bits in FIG. 13.
The barrel-shifter unit circuit having a data length of 4 bits constitutes a bit using a n-channel MOS transistor. That is, the barrel-shifter unit circuit comprises an input terminal I, address terminals A0 to A3 coupled to the output side of the decoder 20, i/o terminals I0 to I3 for coupling the barrel-shifter unit circuits to one another by way of data lines 15, an output terminal O, an input side inverter 29, transfer gates 30 to 33 each composed of an n-channel MOS transistor, a pull-up p-channel MOS transistor 34 coupled to a source potential V.sub.cc and an output side inverter 35.
The input terminal I is coupled to the i/o terminal I0 by way of the inverter 29. The address terminals A0 to A3 are coupled to the gate electrodes of the transfer gates 30 to 33 respectively. The transfer gates 30 to 33 are respectively coupled to the i/o terminals I0 to I3 at one terminals thereof and are coupled in common to the input portion of the output side inverter 35 at the other terminals thereof. The output portion of the output side inverter 35 is coupled to the output terminal O.
The operation of the right shift 4-bit barrel-shifter having the above arrangement will be described hereinafter.
In FIG. 13, 4-bit input data DI0 to DI3 input to the input terminals I of the barrel-shifter unit circuit 10 to 13 are shifted fight respectively by desired digits based on the address signal produced by the decoder 20 to be produced from the output terminals O of the barrel-shifter unit circuits 10 to 13 as output data DO0 to DO3 respectively.
FIG. 15 is a block diagram showing the arrangement of a conventional left shift 4-bit barrel-shifter described in the above reference. The left shift 4-bit barrel-shifter shifts input data left by changing the coupling directions of the data lines 15 in the barrel-shifter in FIG. 4.
The barrel-shifter having the arrangement set forth above, however, can shift input data only in either direction of right and left, which is determined by the coupling direction of the data lines 15 between the barrel-shifter unit circuits. As a result, the following ways are needed for realizing a bi-directional data shift.
That is, a first way is preparing the right shift barrel-shifter in FIG. 13 and the left shift barrel-shifter in FIG. 15 respectively and a second way is to provide a circuit arrangement as illustrated in FIG. 16.
FIG. 16 is a block diagram showing an arrangement of a conventional bi-directional data shift 4-bit barrel-shifter, in which selectors 40 to 43 are provided on the input side of the barrel-shifter illustrated in FIG. 14 and selectors 50 to 53 are also provided on the output side thereof to thereby realize the bi-directional data shift by selecting the selectors 40 to 43 and the selectors 50 to 53.
The combination of the right and left barrel-shifters or the circuit arrangement as illustrated in FIG. 16 cause a problem that the number of elements is increased and the circuit scale is enlarged.
USPTO Backgrounds
USPTO Backgrounds