Many processors may make use of virtual or demand-paged memory schemes, where sections of a program's execution environment may be mapped into fixed sized segments or frames of physical memory as needed. Virtual memory schemes may allow the use of a physical memory that may be much smaller in size than the linear address space of the processor and may also provide a mechanism for memory protection so that multiple tasks or programs sharing the same physical memory do not interfere with each other. The effectiveness of caching techniques employed to facilitate translation of a linear or virtual address to physical address may be limited by the page or frame sizes used in some computing systems.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the drawings have not necessarily been drawn accurately or to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity or several physical components included in one functional block or element. Further, where considered appropriate, reference numerals may be repeated among the drawings to indicate corresponding or analogous elements. Moreover, some of the blocks depicted in the drawings may be combined into a single function.
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