1. Technical Field
The present invention relates to a packaging structure and a packaging method of electronic components, which are suitable for their being applied to a memory module, a driver for a liquid crystal display and so on.
2. Background Arts
A printed circuit board has hitherto been formed in a flat plate-like shape, wherein electronic components (circuit components) mounted on a surface thereof are connected by wires. FIG. 23 shows this type of conventional printed circuit board 1.
A surface of this printed circuit board 1 is mounted with a plurality of electronic components 10a–10d. Then, the electronic components 10a, 10d disposed at both ends are connected by a wire 11a, and the electronic components 10b, 10c therebetween are connected by a wire 11b. 
Proposed further is a multi-layer wiring board 15 wherein, as shown in FIG. 24, an insulating layer 13 made of a flexible film is folded at a predetermined folding portion 14 and stacked (laminated) in thicknesswise direction (refer to, e.g., Patent document 1).
In this multi-layer wiring board 15, a single-layer conductive circuit layer 16 is formed on the insulating layer 13 developed before being folded, and these layers are folded, whereby the conductive circuit layer 16 can be multi-layered. Accordingly, the manufacturing process can be simplified as compared with a case of stacking the plurality of conductive circuit layers 16 one by one.
Note that in FIG. 24, the numerals 17, 18 represent conductive members inserted into holes of the insulating layer 13, the numeral 19 stands for an inter-layer insulating layer, the numeral 20 designates an electronic component, and the numeral 21 indicates a motherboard.
[Patent Document 1]
Japanese Patent Application Laid-Open Publication No.2002-171069 (FIG. 5)
In the conventional flat plate-like printed circuit board 1 (see FIG. 23), however, there arises a problem, wherein if an interval between the electronic components 10a, 10d that should be connected is large, a length L3 of the wire 11a therebetween becomes elongate.
Thus, if the length L3 of the wire 11a between the electronic components 10a, 10d is elongated, a problem such as cross-talk, a signal delay, etc might occur.
These problems occur similarly in the multi-layer wiring board 15 (see FIG. 24) formed by folding and stacking the layers. Namely, in this multi-layer wiring board 15, when connecting the electronic components 20 disposed on both surfaces thereof to the motherboard 21, the wires (unillustrated) therebetween are formed in a state of developing the conductive circuit layer 16. Therefore, in the developed state of the conductive circuit layer 16, if there is a large interval between the conductive member 17 on the side of the electronic component and the conductive member 18 on the side of the motherboard 21, a length of the wire making a connection therebetween also gets elongate.
USPTO Backgrounds
USPTO Backgrounds