1. Field of the Invention
The present invention relates to a display apparatus such as a liquid crystal display apparatus capable of displaying a desired image on a display screen by applying a driving signal to each of a plurality of pixel electrodes arranged two-dimensionally via a corresponding switching device; a method for producing the same; and an active matrix substrate included in the display apparatus.
2. Description of the Related Art
Conventionally, this type of display apparatuses include, for example, liquid crystal display apparatuses, EL (electroluminescence) display apparatuses, and plasma display apparatuses. Such display apparatuses are capable of displaying a desired display pattern. (image) at high density on a display screen by, for example, selectively driving a plurality of pixel electrodes arranged in a matrix.
As a system for selectively driving the pixel electrodes, an active matrix system is known. According to the active matrix system, a plurality of pixel electrodes are arranged in a matrix (in rows and columns), and switching devices are respectively connected to the pixel electrodes. The pixel electrodes are selectively driven via a corresponding switching device. Generally known switching devices for selectively driving the pixel electrodes include, for example, TFTs (thin film transistors), MIM (metal-insulator-metal) devices, MOS (metal-oxide-semiconductor) transistors, and diodes. The above-mentioned type of display devices include a liquid crystal layer, an EL light emitting layer, a plasma light emitting element or various other types of display mediums interposed between the pixel electrodes and a counter electrode facing the pixel electrodes. The active matrix driving system is capable of realizing high contrast display and thus is practically used for liquid crystal TVs, computer terminal displays, and the like.
FIG. 32A is a plan view illustrating a single display unit of an active matrix substrate 100 of a conventional active matrix liquid crystal display apparatus. FIG. 32B is a cross-sectional view of a part of FIG. 32A taken along line X–X′. FIG. 32C is a cross-sectional view of a part of FIG. 32A taken along line Y–Y′.
In addition to the active matrix substrate 100 shown in FIGS. 32A through 32C, the conventional active matrix liquid crystal display apparatus includes a counter substrate facing the active matrix substrate 100 and a liquid crystal layer acting as a display medium. The active matrix substrate 100 includes a glass plate 10 is (FIGS. 32B and 32C), a plurality of gate bus lines 1 (scanning lines), and a plurality of source bus lines 2 (signal lines). The plurality of gate bus lines 1 and the plurality of source bus lines 2 are provided on the glass plate 10. The plurality of gate bus lines 1 are provided parallel to each other in a row direction at a prescribed distance from each other. The plurality of source bus lines 2 are provided parallel to each other in a column direction at a prescribed distance from each other. Thus, the plurality of gate bus lines 1 and the plurality of source bus lines 2 are arranged in a lattice. The source bus lines 2 may be perpendicular to, or may simply cross, the gate bus lines 1. A pixel electrode 3 (represented by the dashed line in FIG. 32A) is provided in each of the areas surrounded by the gate bus lines 1 and the source bus lines 2. Alternatively, the pixel electrode 3 may be provided at each of intersections of the gate bus lines 1 and the source bus lines 2. Thus, a plurality of pixel electrodes 3 (only one is shown in FIG. 32A) are provided in a matrix. Each pixel electrode 3 is formed of a transparent electrode.
As shown in FIG. 32A, two TFTs 4 each acting as a switching device are provided at portions branching from each gate bus line 1. As shown in FIG. 32B, the TFT 4 is provided on the glass plate 10 with a base coat layer 11 interposed therebetween. The TFT 4 includes a semiconductor layer 12 formed of silicon (Si). The semiconductor layer 12 includes a channel region 12a, source and drain regions 12c (e.g., formed of n+-Si), and LDD regions (e.g., formed of n−-Si) 12b. The source and drain regions 12c have impurities implanted thereto at a high concentration. The LDD regions 12b are interposed between the channel region 12a and the source and drain regions 12c, and have impurities implanted thereto at a low concentration. On the channel region 12a, a gate region 1a is provided with a gate insulating layer 13 interposed therebetween. The gate region 1a branches from the gate bus line 1. The gate region 1a is covered with the pixel electrode 3 with an interlayer insulating layer 14 and a resin layer 15 interposed therebetween. Although not shown, an alignment layer (PI) is provided on the pixel electrode 3, and the liquid crystal layer is provided in contact with the alignment layer.
Referring to FIG. 32A again, a storage capacitance bus line (storage capacitance line) 5 is provided along, and parallel to, each gate bus line 1. The storage capacitance bus line 5 is patterned in the same step as the gate line 1 and formed of a metal layer (gate metal). The storage capacitance bus line 5 includes a wide portion 5A. As shown in FIG. 32C, an extended semiconductor portion 12d which extends from the drain region 12c of the TFT 4 and is provided below the wide portion 5A with the gate insulating layer 13 interposed therebetween. The extended semiconductor portion 12d is connected to the pixel electrode 3 via a metal layer 6 (source metal layer) and a contact hole 6A. The source metal layer 6 is patterned in the same step as the source bus line 2. The contact hole 6A is formed in the interlayer insulating layer 14 and the resin layer 15. Thus, the extended semiconductor portion 12 acts as one storage electrode, and faces the wide portion 5A acting as the other storage electrode with the gate insulating layer 13 interposed therebetween. Thus, a storage capacitance is formed between the extended semiconductor portion 12d and the wide portion 5A.
The conventional active matrix liquid crystal display apparatus having the above-described structure has the following problems. In the case where, for example, a TFT 4 acting as a switching device is defective, the pixel electrode connected to the defective TFT 4 is not supplied with a signal voltage, which should normally be provided. The user recognizes this as a point-like pixel defect (hereinafter, referred to as the “point defect”) on the display screen such a point defect significantly spoils the display quality of the liquid crystal display apparatus, and is a serious problem in terms of production yield.
The main causes of such a point defect are roughly classified into the following two typen.
One type of defect is an ON defect. An ON defect occurs when a pixel electrode 3 cannot be sufficiently charged with an image signal from the source bus line 2 during the time period in which the corresponding TFT 4 is selected by the scanning signal from the gate bus line 1. This is caused by, for example, a defect of the TFT 4. The other is an OFF defect. An OFF defect is caused when the charge provided to the pixel electrode 3 leaks during the time period in which the corresponding TFT 4 is not selected. This is also caused by, for example, a defect of the TFT 4.
The ON defect is caused by the defect of the TFT 4 as a switching device. The OFF defect occurs in two cases: (i) when an electric leak occurs through the TFT 4 as a switching device; and (ii) when an electric leak occurs between the pixel electrode 3 and the gate bus line 1/source bus line 2. In both the ON defect and the OFF defeat, the voltage applied between the pixel electrode 3 and the counter electrode (not shown) does not reach the level necessary for display. As a result, in the normally white mode (in which the light transmittance is maximum when the voltage applied to the liquid crystal layer is 0 V), the defective pixel is recognized as a luminous point; and in the normally black mode (in which the light transmittance is minimum when the voltage applied to the liquid crystal layer is 0 V), the defective pixel is recognized as a black point.
Such a point defect can be detected by an inspector with the naked eye as follows. When the active matrix substrate 100 including the TFTs 4 as switching devices and a counter substrate including the counter electrode are put together and a liquid crystal material is injected into the space between the two substrates, a prescribed electric signal (inspection signal) is applied to the gate bus line 1 and the source bus line 2. Then, a repair work is performed as follows. For example, the source bus line 2 and the pixel electrode 3 are melted to be shortcircuited, or the drain region (a part of the semiconductor layer) acting as the drain electrode of the TFT 4 is cut off from the TFT 4 to electrically separate the TFT 4 from the pixel electrode 3. Thus, the pixel electrode 3 is charged and discharged by a signal voltage from the source bus line 2 regardless of whether the corresponding gate bus line 1 is selected or non-selected. In this manner, the liquid crystal display apparatus fulfills the inspection criteria and can be shipped as being substantially equivalent to normal apparatuses.
Such a repair work of the defective pixel is performed by laser radiation (laser repair). For improving the possibility of success of the repair work, Japanese Laid-Open Publication No. 2000-81639, for example, proposes the following liquid crystal display apparatus. A portion which is to be cut by laser radiation is constricted, and the pixel electrode and the interlayer insulating layer are partially removed so as not to cover the constricted portion (laser radiation portion), as described in more detail below with reference to FIG. 33.
FIG. 33 is a plan view illustrating a schematic structure of one display unit of an active matrix substrate of the liquid crystal display apparatus disclosed in Japanese Laid-Open Publication No. 2000-81639.
As shown in FIG. 33, the active matrix substrate has three constricted portions: one is a constricted portion a in the drain region of the TFT 4; another is a constricted portion b in the extended semiconductor portion 12d, which faces the gate bus line 1 to form a storage capacitance, and still another is a constricted portion c in the vicinity of the gate region branched from the gate bus line 1. The pixel electrode 3 (hatched) is not provided on the constricted portions a through c. In another structure, the interlayer insulating layer is not provided on the constricted portions a through c. A portion 31 which is open at the center of the pixel electrode 3 is a contact portion through which the pixel electrode 3 and the extended semiconductor portion 12d are connected to each other.
In the case where, for example, the gate region 1a and the drain region of the TFT 4 are shortcircuited, the constricted portion a is out in the normally black mode and the constricted portion c is out in the normally white mode. Thus, the source region and the drain region are shortcircuited via the gate region 1a. 
In the case where the pixel electrode 3 and another pixel electrode adjacent thereto are shortcircuited at point D1, the constricted portion a is cut in the normally black mode and the constricted portion a of the adjacent pixel electrode is cut in the normally white mode.
In the case where the extended semiconductor portion 12d and the gate bus line 1 corresponding to the adjacent pixel electrode are shortcircuited at point D2, the constricted portion b is out in the normally black mode. In the normally white mode, the constricted portion c is cut so as to shortcircuit the source region and the drain region of the TFT 4 via the gate region 1a, and the constricted portion b is cut.
By providing the constricted portions a through c, the width of the portions to be out is made thinner than the usual width. Thus, the portions are more easily cut, such that the repair can be performed easily. As described above, the pixel electrode 3 is not provided on the laser radiation portions. Therefore, the pixel electrode 3 is not deformed even when the portions to be repaired are out by laser radiation. This substantially avoids such a secondary defect that the pixel electrode 3 contacts the counter electrode (not shown) facing the pixel electrode 3 or the out surface of the portions to be repaired. Since pieces of the interlayer insulating layer generated by cutting do not adhere to the conductive pixel electrode 3, the counter electrode and the other electrodes do not easily form conductive contacts with each other, which avoids further defects. The structure in which the pixel electrode 3 is not provided on the laser radiation portions provides further advantage that the laser power is not absorbed by the pixel electrode 3 and thus the level of the laser power required for cutting is lowered. This decreases the risk of a defective display due to the disturbance of the alignment layers and the disturbance of the alignment of the liquid crystal molecules. In the case where neither the pixel electrode 3 nor the interlayer insulating layer are provided on the laser radiation portions, metal pieces resulting from the cutting do not adhere to the pieces of the interlayer insulating layer. This avoids the risk of re-leak of charges at the cut portions. The structure in which the interlayer insulating layer is not provided on the laser radiation portions provides the further advantage that the laser power is not absorbed by the interlayer insulating layer and thus the level of laser power required for cutting is lowered.
In order to efficiently perform laser repair of the above-mentioned point defect, it is necessary to accurately evaluate and adjust the laser radiation position, laser light intensity, laser size (size of the laser spot R), the number of times of irradiation with laser radiation, and the like. Even with such evaluation and adjustment, there still may occur leaks and other defeats due to pieces of conductive material being scattered around by excessive laser power or due to bulging of the conductive layer. Therefore, it is very difficult to realize a 100% success rate of laser repair. In order to perform the repair work more precisely and efficiently, it is important to avoid leaks or other defects.
Japanese Laid-Open Publication No. 2000-81639 constricts the portions to be cut such that these portions can be more easily cut, and partially remove the pixel electrode 3 and the interlayer insulating layer so as to eliminate the causes of the leaks. The constricted portions advantageously allow the cutting to be done at a lower laser power. However, this method requires additional steps of partially removing the transparent pixel electrode 3 and the interlayer insulating layer so as not to cover the laser radiation portions. This undesirably complicates the production method.
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