In general, as the integration density of integrated circuit devices increases, conventional metal-insulator-semiconductor (MIS) capacitors may have relatively low dielectrics so that they may not provide desired capacitance values. As a result, metal-insulator-metal (MIM) capacitors may be used to replace MIS capacitors.
FIG. 1 is a cross-sectional view of a conventional integrated circuit device that comprises a MIM capacitor. As shown in FIG. 1, a contact plug 15 is formed in an interlevel-insulating layer 13 on a substrate 11, e.g., a silicon substrate. The contact plug 15 may comprise a TiN layer and may be used as a barrier layer. A MIM capacitor 23 is formed on the contact plug 15. The contact plug 15 may connect the MIM capacitor 23 to a driving transistor (not shown) allowing charges to accumulate on the MIM capacitor 23 or be discharged from the MIM capacitor 23. The MIM capacitor 23 comprises a lower electrode 17, a dielectric layer 19, and an upper electrode 21. The lower electrode 17 and the upper electrode 21 may comprise a metal, such as Pt or Ru, and the dielectric layer 19 may comprise Ta2O5.
Unfortunately, cracks may occur in the interlevel-insulating layer 13 due to stress generated during the deposition of the TiN layer, i.e., the contact plug 15. Also, due to generally poor step coverage of the TiN layer, a seam may occur in the TiN layer if the TiN layer is deposited and then planarized by chemical mechanical polishing (CMP).
USPTO Backgrounds
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