Semiconductor conductor component manufacturers are constantly striving to increase the performance of their products. The packaging of semiconductor die may affect the performance of a semiconductor component that includes the semiconductor die. Discrete semiconductor devices and integrated circuits are fabricated in wafers, which are then singulated or diced to produce semiconductor die. One or more semiconductor die are placed in a package to protect them from environmental and/or physical stresses.
The packaging of semiconductor die should provide protection, permit transmission of electrical signals to and from the semiconductor die, and permit removal of heat generated by the semiconductor die. Further, different packaging structures may increase the parasitic capacitances in a packaged semiconductor component which may decrease the frequency of operation of the packaged semiconductor component.
For simplicity of illustration and ease of understanding, elements in the various figures are not necessarily drawn to scale, unless explicitly so stated. In some instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the claimed subject matter. The following detailed description is merely exemplary in nature and is not intended to limit the disclosure of this document and uses of the disclosed embodiments. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding text, including the title, technical field, background, or abstract.
USPTO Backgrounds
USPTO Backgrounds