Many system components and end user devices of a communication system transport data via serial transmission paths. Internally, however, the system components and end user devices process data in a parallel manner. As such, each system component and end user device is typically configured to receive serial data and convert the serial data into parallel data (without loss of information) for processing. For high-speed serial transmissions, the communication channel (e.g., printed circuit traces, copper cabling, and the like) may introduce frequency-dependent attenuation in the form of inter-symbol interference (ISI). As a result, the signal arriving at the data receiver may be severely distorted.
Equalizers are often implemented in data receivers to reduce or cancel ISI in the received signals. For example, a decision feedback equalizer (DFE) uses the decision of a received symbol, through feedback, to filter out ISI from the decision for a subsequent symbol. However, various components of the data receiver (such as the automatic gain control (AGC) or variable gain amplifier (VGA)), the transmitter, and/or the communication channel may introduce nonlinearities in the data signal. As a result, the voltage of the received signal is often a nonlinear function of the voltage that was originally transmitted. For example, signal voltages that are significantly different at the transmitter may be perceived to be substantially similar (or equal) when the signal is received by the receiver. This may affect the accuracy of symbol detection and further limit the effectiveness of the equalization circuitry.
Thus, it is desirable to reduce or mitigate nonlinearities in the received signal prior to equalization.
USPTO Backgrounds
USPTO Backgrounds