The invention relates to color field sequence detection and in particular, to a universal standard, digital circuit for detecting a specific color field in the color field sequence of a color television signal, using a clock that is unrelated to color subcarrier but which is locked to horizontal sync, wherein the usual phase locked loop is eliminated.
In the field of color television, the detection and identification of a specific color field in the color field sequence of an NTSC, PAL, etc., color television standard, is a well known process that is required when performing such processes as color field editing, color framing of videotape recorders, time base correction of color signals, etc. For example, a time base corrector must convert any off-tape field to the field type dictated by the station reference. Likewise, the proper color field must be known when performing an edit process to prevent the generation of undesirable picture shifts.
In turn, color field detection requires the identification of a phase relationship between the color subcarrier signal and the horizontal sync. This relationship for the color fields of the color field sequence in an incoming video reference signal, differs in accordance with the standard.
Because of the television raster scan system of interlace, adjacent fields are offset vertically by one-half scan line. In addition, the color encoding structure is not identical on corresponding lines of different fields. Thus, for example, in NTSC there are two unique color frames each having two interlaced fields. The fields are normally indicated as fields 1 and 2 of color frame A and fields 3 and 4 of color frame B. Fields 1 and 3 differ in that the encoding chroma subcarrier phase will be 180.degree. offset for a given line on field 1 compared to the corresponding line on field 3. The same is true when fields 2 and 4 are compared. In PAL, the sync-to-subcarrier relationship and the V axis phase gives four unique frames (eight unique fields).
Typically, detection of the phase relationship of previous mention is performed in an analog domain by using color burst as a reference to synthesize phase coherent subcarrier, and comparing the latter signal to the edge of horizontal sync during the proper line of each video frame. When the comparison meets the selected specification for subcarrier-to-horizontal sync (ScH) phase, detection of the specified color field, generally color field 1, can be made consistently.
Analog color field sequence detectors presently found, for example, in videotape recorders, editors, etc., require significant analog circuitry. This, in turn, maximizes the susceptibility of the detector to the noise, drift, etc., problems commonly associated with analog circuits. In addition, most of the circuitry must be duplicated for each standard which is handled by the apparatus, thus increasing the components, the complexity, the space required and the costs.
In the analog system, a phase locked loop is employed to continuously re-generate the color subcarrier in a phase locked condition over successive intervals of horizontal lines. The synthesized phase coherent subcarrier then is compared to the edge of horizontal sync during the proper line of each video field. As is well known, phase locked loops are susceptable to the problems of noise, drift, added component count and difficulty in board layout.
In a recent development, a digital color field sequence detector provides color field 1 detection via digital circuitry, wherein the usual phase locked loop has been eliminated. To this end, a reference signal of subcarrier frequency is generated internally starting with the falling edge of H-sync, using a crystal oscillator. The phase of this reference signal then is compared to the incoming burst of the same line when it occurs. Since burst occurs a relatively short time after H-sync, a free-running time base is sufficiently accurate to allow making a phase comparison without the need for phase locked loop circuitry. Such a digital color field 1 detector is described in copending patent application Ser. No. 242,946, filed Sept. 9, 1988, and assigned to the same assignee as this application.
However, this prior digital system requires a number of reference clocks, one for each color television standard. In addition, due to the fact that the reference clock oscillator source is free-running, the system inherently suffers from a rather large measurement uncertainty which, in turn, makes it difficult to adjust. It follows that the system is somewhat complex and requires a relatively large number of components.
The present invention circumvents the disadvantages of the above digital as well as analog color field sequence detector circuits, while providing the inherent advantages of a digital circuit which detects color field 1 with relatively fewer digital components, and which further eliminates the need for the phase locked loop of the analog systems.
More particularly, in a video system that includes a clock source which is phase locked to horizontal sync, (that is, is based on a line locked sample system) and which has a frequency sufficiently higher than the color subcarrier frequency, the invention contemplates a number of advantages. For example, the invention does not require additional reference clock oscillators, or the extra dividers required to generate several reference clocks from a single crystal oscillator. The invention uses one reference clock source for the NTSC, PAL and PAL-M color television standards. In addition, the invention technique inherently provides more accurate phase measurements and as such is easier to adjust. Further, the present digital color field 1 detector requires fewer components and thus requires less board space, is easier to lay out and readily lends itself to implementation as a gate array.
More particularly, an analog processor section includes a sync stripper and an odd/even field detector to provide composite sync and odd/even field signals, and a burst processor to provide a squared burst signal. In addition, a burst invert signal and a system reference clock are provided from the system timing generator, wherein the detector circuitry is locked to horizontal sync and is the same frequency regardless of the color television standard. A digital processor section includes a line selector circuit for providing a signal indicating a selected video line signal during which detection is made, and a gate signal for providing a one line gate pulse, or window, for limiting the color field 1 signal to one line duration. The digital processor section further includes a correlator control circuit responsive to the selected line signal as well as to the standard, for counting an exact number of the system reference clock cycles, and to then enable operation of a burst correlator circuit. The number of clock cycles to be counted varies with the standard, whereby a point near the center of burst may be located by counting the number of clock cycles associated with the standard being used. The correlator control circuit supplies a correlator start signal of selected logic level to enable the burst correlator circuit at the center of burst. The correlator circuit takes a sample in each of three consecutive similar half-cycles of burst, and then correlates the results to determine if the burst samples are positive or negative. By way of example, if positive, the final count of three samples is a +3 and, if negative, the final count of three samples is a -3. If three samples are taken, any count other than .+-.3. indicates an invalid burst, or improper adjustment.
A state machine monitors the sequence of positive and negative count values. When the proper sequence corresponding to the standard is detected, a color field pulse is supplied to a flywheel which, in turn, supplies a color field 1 identification logic level for the duration of color field 1.
Thus, it may be seen that the reference signal generation, phase detection, sequence detection and timing generation all are performed in the digital domain with its inherent advantages of ease of board layout, lower component count, less board space requirements, adaptability to multiple color television standards and operating stability, as well as the elimination of the phase locked loop as previously mentioned.
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