The subject matter disclosed herein relates to super-junction (SJ) power devices and, more specifically, to edge termination techniques for SJ power devices.
For semiconductor power devices, super-junction (SJ) (also referred to as vertical charge-balance) designs offer several advantages. For example, SJ devices demonstrate reduced on-resistance and reduced conduction losses relative to conventionally designed unipolar power devices. Additionally, SJ drift layers can be applied to a variety of power devices, such as metal-oxide-semiconductor field-effect transistors (MOSFETs), junction field effect transistors (JFETs), bipolar junction transistors (BJTs), diodes, as well as other devices that may be useful for medium-voltage (e.g., 2 kV-10 kV) and high-voltage (e.g., greater than or equal to 10 kV) power conversion related applications.
For high-voltage and/or high-current applications, devices fabricated using wide bandgap semiconductors (e.g., silicon carbide (SiC) and gallium nitride (GaN)) have a number of advantages in terms of temperature stability, reduced on-state resistance, and thinner device dimensions than corresponding silicon (Si) devices. Accordingly, wide bandgap semiconductor devices offer advantages to electrical conversion applications including, for example, power distribution systems (e.g., in electrical grids), power generation systems (e.g., in solar and wind converters), as well as consumer goods (e.g., electric vehicles, appliances, power supplies, etc.). However, there are also significantly higher electric fields present in wide bandgap semiconductors devices under reverse bias. As such, it is desirable to provide effective edge termination designs for wide bandgap semiconductor devices, such as SiC-SJ devices, to ensure reliable and robust device operation under reverse bias.
USPTO Backgrounds
USPTO Backgrounds