Field of the Invention
The present invention relates to a printed wiring board and a method for manufacturing the printed wiring board, the printed wiring board having a cavity for exposing a mounting area.
Description of Background Art
Japanese Patent Laid-Open Publication No. 2015-60912 describes a package substrate for mounting a semiconductor element, the package substrate including a multilayer base substrate and a cavity substrate, the base substrate having a mounting area for mounting an electronic component, and the cavity substrate having a cavity for exposing the mounting area. The entire contents of this publication are incorporated herein by reference.
USPTO Backgrounds
USPTO Backgrounds