Semiconductor devices are typically manufactured on semiconductor wafers or other types of workpieces using sophisticated equipment and processes that enable reliable, high-quality manufacturing. The individual dies (e.g., devices) generally include integrated circuits and a plurality of bond-pads coupled to the integrated circuits. The bond-pads provide external contacts through which supply voltage, electrical signals, and other input/output parameters are transmitted to/from the integrated circuits. Bond-pads are usually very small, and they are typically at an active side of a die in a dense array having a fine pitch. As a result, the bond-pads are typically electrically connected to a larger array of ball-pads or pins using wirebonds and/or redistribution structures.
Conventional bond-pads are typically formed by depositing an aluminum layer onto a semiconductor substrate using physical vapor deposition (PVD) techniques. The aluminum layer is then patterned and etched to form electrically isolated bond-pads. This process is relatively expensive because patterning and etching require expensive microlithography equipment and materials. Aluminum is also being replaced by copper to increase the speed of devices and enable smaller lines because of the higher conductivity of copper. Copper lines are often made by depositing a seed layer of copper into trenches using physical vapor deposition processes, electroplating copper into the trenches, and planarizing the copper to form copper damascene lines and copper bond pads coupled to the copper damascene lines. Copper, however, does not provide a suitable surface for wirebonding, so the copper bond pads must be coated with gold, silver, palladium, aluminum, or another suitable wirebonding film to which wirebonds can be attached.
One existing method for forming copper bond-pads is to form copper terminals at the active side of the substrate and then cover the copper terminals with suitable wirebonding materials. For example, after forming copper terminals at the active side of the substrate, a passivation layer with openings aligned with corresponding copper terminals is formed over the active side of the substrate. Nickel is then electrolessly plated onto the copper terminals, and a suitable wirebonding material, such as gold, silver, palladium, or aluminum, is subsequently deposited onto the nickel. Although this process is useful, copper bond-pads formed according to this process are subject to reliability concerns, such as the passivation layer delaminating from the copper when exposed to moisture for extended periods of time. This can cause shorting or other problems with a die, and bridging is more acute as the spacing between metal lines decreases.
USPTO Backgrounds
USPTO Backgrounds