1. Field of the Invention
The invention relates to a complementary metal-oxide-semiconductor (hereinafter abbreviated as CMOS) device, and more particularly, to an electrostatic discharge (hereinafter abbreviated as ESD) protection CMOS device.
2. Description of the Prior Art
Chips and/or Integrated circuits (ICs) are the most essential hardware foundation of the modern information society. As products based on ICs become more and more delicate, they also become more and more vulnerable to the impacts from external environment. For example, it is found that ESD is a constant threat to modern electronics. The result of ESD on unprotected ICs is often destruction, characterized by melting or explosion of a part of the ICs. Therefore, the ESD protection devices are taken as important components of the protection circuitry provided in today's electronic devices.
However, conventional ESD protection circuits may be prone to latch-up. Latch-up is the creation of an undesirable current path between rails, such as VDD and ground, which causes large amounts of current to be drawn from the power supply. In particular, latch-up is known to be initiated by an equivalent circuit of a cross-coupled. Latch-up may cause circuit malfunction and/or irreversible damage to the ICs. As a countermeasure against to the problems, there have been proposed the donut-shaped guard ring to avoid latch-up occurrence. Also, a higher holding voltage is required for reducing latch-up risk.
With the scaling of standard CMOS technology, the spacing of the p+/n+ space decreases, leading to a lower trigger condition and easy onset of CMOS latch-up. To overcome this disadvantage, the width of the guard rings is usually increased or the amount of the guard ring is doubled at the expense of circuit packing density. Therefore, a semiconductor device, particularly the ESD protection semiconductor device, with a simple guard ring and high holding voltage for providing sufficient latch-up avoidance resulting in smaller and more densely packed chip devices is still in need.
USPTO Backgrounds
USPTO Backgrounds