Placing a digital signal processor inside a pluggable module, for a network device, allows short interconnect lines between the digital signal processor (DSP) and photonic integrated circuits (PIC) such as a solid-state laser and integrated optical receiver, for fiber-optic communication. Packaging density could be improved by moving digital signal processors from the pluggable modules to the main body of the network device. But, this makes longer interconnect lines between a digital signal processor in the main body of the network device and the photonic integrated circuits in the pluggable modules, and introduces greater losses plus additional connector losses and reflections to manage and compensate. These problems are ever more critical for increasing modulation levels of Quadrature Phase Shift Keying (QPSK), 8-Quadrature amplitude modulation (QAM), 16-QAM, 32-QAM, 64-QAM, etc. It is within this context that the embodiments arise.
USPTO Backgrounds
USPTO Backgrounds