This invention relates to the fabrication of hybrid integrated circuits, and in particular to a method of forming a thin film circuit on an insulator overlying a semiconductor wafer which includes active semiconductor devices.
At the present time, hybrid integrated circuits are used in a number of applications requiring precision circuit operation. Such circuits are typically fabricated by forming thin film resistors, capacitors, interconnect metal and bonding pads on an insulating substrate such as ceramic. Resistors are typically defined from a layer of tantalum nitride and capacitors typically comprise an anode of tantalum, a dielectric of tantalum oxide, and a counter electrode of nickel-chromium and gold. Interconnect metal is usually a multi-layer of titanium, palladium, and gold or nickel-chromium and gold. (See, for example, U.S. Pat. No. 3,607,679, issued to Melroy, and U.S. Pat. Application of Arcidiacono et al, Ser. No. 974,162, filed Dec. 28, 1978 now U.S. Pat. No. 4,251,326 and assigned to Western Electric Co.) Silicon integrated circuit chips are then bonded to appropriate pads on the substrate. After fine-tuning the thin film components, the hybrid circuit is complete.
Although such circuits perform adequately, it has been recognized that circuit fabrication could be far more economical if the thin film and semiconductor processing could be combined on a single substrate. Various proposals have been made for the marriage of silicon IC and tantalum thin film technologies. (See, e.g., U.S. Pat. No. 3,430,334, issued to Douta et al.).
However, until now, a commercially viable method had not been discovered due to the basic incompatibility of the processing requirements of the two technologies and the need for making the thin film components as small as possible to save semiconductor material. For example, capacitor reliability was a particular problem since the capacitor dielectric had to be thin and high temperature resistor stabilization tended to cause leakage of such capacitors. Further, choice of particular materials for the components, interconnects, etchants, as well as the order of fabrication steps had significant effects on the reliability of components. Removing the grid network necessary for capacitor anodization was also a problem, as well as complete removal of photoresist between beam lead contacts. These and a host of other problems confounded attempts to produce a commercially attractive monolithic circuit.
It is therefore a primary object of the invention to provide a method of forming thin film components over a semiconductor substrate including active devices, which method is compatible with the semiconductor devices and still results in reliable, precise thin film components.
USPTO Backgrounds
USPTO Backgrounds