The invention relates to a method for regulating a buck converter, in which the amount of the output voltage is adjusted at an input voltage via a controlled switching of an inductor, switched serially with a load and over which the output voltage drops, using a pulse sequence showing a pulse rate and pulse width being modulated. Here, the output voltage is scanned with a sample rate, its value is digitized, and thus the pulse width is adjusted.
The invention also relates to an arrangement for regulating a buck converter, comprising a control input for a pulse width modulated pulse sequence with a pulse rate and a voltage output. The arrangement comprises a control input, which can be connected to the voltage output of the buck converter, and is provided with a control output, which can be connected to the control input of the buck converter. A non-linear amplifier, an IIR filter, and a pulse width modulation circuit are switched between the control input and the control output. Furthermore, a pulse rate clock generator is provided, determining the pulse rate.
Using a known buck converter, a controlled output voltage can be generated from an input voltage. Here, the amount of the output voltage is always lower than the amount of the input voltage. The amount of the output voltage is adjusted by a controlled switching on and off using at least one switch.
In an embodiment of prior art, two switching transistors are provided, each respectively switching alternating. Both transistors are connected with their source-drain paths in a current circuit between the input voltage and the ground. An inductor is connected therebetween, which is switched serially with a load resistor, over which the output voltage drops. A capacitor is arranged in parallel to the load resistor.
During the period the first transistor is switched on, namely the one located at the side of the input voltage, a load current flows through the inductor and through the load resistor. The second transistor is blocked. During the period the first transistor is switched off, the second transistor is switched on. Now the energy stored in the inductor is drained. The current flows through the load resistor, however now through the second transistor and out of the capacitor.
By modifying the switch on and switch off periods of the transistors the output voltage can be adjusted and controlled by adjusting these periods using settings in turn influenced by the output voltage itself. Here, the regulation occurs in a known fashion by pulse width modulation (PWM) of the control pulses at the gates of the transistors.
An arrangement for controlling a buck converter is known for example from ADP 1872 of Analog Device Inc.
In a digital solution of such a regulation (Digital Control Loop) the output voltage is subjected to an analog-to-digital conversion. Here, the digital voltage value is scanned with a sample rate and supplied via a non-linear amplification and filtering via an infinite impulse response filter (IIR filter) to a pulse width modulation control in order to adjust the pulse width of the gate pulse at the two transistors. Here, the sample rate of the analog-to-digital conversion, not least due to the common use of the same clock base, is identical to the pulse rate of the gate pulses. In other words, the duty cycle of the series of gate pulses, with their duration being modulated, which represents the pulse width modulation, is equivalent to the sample cycle between two samples of the analog-to-digital converter. This leads to the pulse widths during the duty cycle being adjustable only at its beginning.
In a rapid change of load (load transient), with considerable changes of the output voltage occurring within the duty cycle, the pulse width modulation cannot react to such load transients, namely only via the next sample in the next duty cycle. This leads to a high sluggishness and the control overshooting.
The invention is now based on the objective to provide a method and an arrangement by which rapid reaction can occur for any load transient and this way the control of the output voltage at a buck converter occurs quicker and with less overshooting.
USPTO Backgrounds
USPTO Backgrounds