Some high performance passive semiconductor devices benefit from increased depth of a buried doped layer within a semiconductor substrate. For example, an increase in the subcollector depth in a bipolar transistor offers the advantage of an increased breakdown voltage. For another example, the operating frequency of a positive-intrinsic-negative (PIN) diode, in which an intrinsic semiconductor area is sandwiched between a p-doped semiconductor area and an n-doped area, increases with the depth of a buried doped layer, which functions as one terminal of the PIN diode.
According to conventional semiconductor manufacturing methods, the depth of a buried doped layer is typically limited by the ability to form a reachthrough to the buried doped layer. While a deep buried doped layer may be formed by implanting a semiconductor region followed by an epitaxy of semiconductor material of significant thickness, for example, greater than 2 microns, the depth of the reachthrough that can be formed by ion implantation is limited by the projected range of the implanted ions. For example, the projected range of boron ions in silicon accelerated at 1.0 MeV is only about 1.8 microns. The projected ranges for phosphorus ions and arsenic ions accelerated at 1.0 MeV are even less, and are only about 1.2 microns and 0.6 microns, respectively. In addition, the buried doped layers often require heavy doping concentrations on the order of 5.0×1020/cm3 to achieve low resistivity. Implantation of dopants at such high energy and at such a high dose requires a long implantation time on a high performance ion implanter, and consequently, high processing costs. Further, even if such processing steps are employed, the depth of a buried doped layer does not exceed 2.0 microns unless the ion implantation energy is increased even higher, which is difficult to achieve with commercially available ion implanters.
A method of forming a buried doped layer, or a “far subcollector”, at a depth greater than the projected range implanted ions by employing multiple stages of reachthroughs is known in the prior art. According to this method, a doped region is formed on an initial semiconductor substrate. A first epitaxial semiconductor layer is grown on the surface of the initial semiconductor substrate up to a thickness through which a reachthrough may be formed by ion implantation, that is, up to the thickness of the projected range of ions of the subsequent ion implantation process. After the formation of a first reachthrough within the first epitaxially grown layer, a second epitaxial semiconductor layer is grown on the first epitaxially grown layer. A second reachthrough is formed by ion implantation into the second epitaxially grown layer. According to this prior art, each round of epitaxial growth of a semiconductor layer extends the depth of a buried semiconductor layer by the projected range of the subsequent ion implantation, that is, by the depth of the reachthrough subsequently formed therein. The increase in the depth of the buried doped layer is practically limited to less than about 1.2˜1.8 microns due to the energy limitations on the available ion implanters. Further, high temperature requirement for epitaxy of a semiconductor material causes bulk diffusion of the dopants in the buried doped layer, thereby reducing the depth of the buried doped layer and also reducing the doping density, and consequently, the conductivity of the buried doped layer.
Therefore, there exists a need to provide semiconductor structures with a buried doped layer, or a “far subcollector,” located at a depth that exceeds typical projected ranges of ion implantation process, and a reachthrough that electrically connects the far subcollector to a structure at a surface of a semiconductor substrate, and methods of manufacturing the same.
Further, there exists a need to provide semiconductor structures with a far subcollector and a reachthrough to the far subcollector and methods of manufacturing the same with minimum additional processing steps and processing costs.
USPTO Backgrounds
USPTO Backgrounds