1. Field of the Invention
The present invention relates to a semiconductor device, which in particular is formed on an SOI (silicon on insulation) substrate and has an ESD protection function. Furthermore, the present invention relates to an ESD protection circuit which can be formed on this type of semiconductor device.
2. Background Information
In the field of semiconductor devices, especially an integrated circuit with a field effect transistor (hereinafter to be referred to as an MOS transistor), it has been an important subject as to how the device can be protected against electrostatic discharge (ESD) generated from a human body or other devices.
There are various methods and structures for protecting a semiconductor device from electrostatic surge. For example, with respect to a typical MOS transistor formed in a bulk substrate, a method of discharging electrostatic surge using a parasitic diode having a simplex polarity, which is formed within a device structure, may be applied. This parasitic diode is formed between a diffusion layer of a drain and diffusion layers which include a well layer and a layer for power dispatching of the well layer. In this case, for instance, when an output circuit constitutes a bulk structured MOS transistor, the electrostatic surge applied to a drain through an output terminal will be discharged to the power source through a well-electric supply terminal due to forward operation of the parasitic diode.
In recent years, in order to realize lower power consumption, higher efficiency and miniaturization of electronic devices, development of a semiconductor device using an SOI substrate has been actively pursued. Especially, an FD (fully depleted) type SOI-MOS transistor has been attracting attention. In this FD type SOI-MOS transistor, the semiconductor layer (SOI layer) on the insulation film is thin and has a thickness of 50 nm or less, and the transistor operates while the SOI layer is under a fully depleted state. The FD type SOI-MOS transistor can make its threshold voltage smaller, and therefore, it is considered as a very useful device in realizing low power consumption and high speed operation.
For example, one patent reference (Japanese Laid Open Patent Application No. 2003-209185, pp. 3-4, FIG. 1) discloses such semiconductor device which has a protection function against electrostatic discharge damage. The semiconductor device introduced by this patent reference uses the SOI substrate, and it has a protection element made up of a thyristor. The structure elements are disposed in the lateral direction of the SOI substrate, and connected to an input terminal, by which it discharges electrostatic surge applied from the exterior.
With respect to the above-described FD type SOI-MOS transistor, the SOI layer, which is an element formation region, is made completely separate from the support substrate by an embedded insulation film, and since the SOI layer beneath the channel is under a fully depleted state at the time of operation, a parasitic diode with a simplex polarity will not be formed through the well layer as in the case of the bulk structured MOS transistor. With the FD type SOI-MOS transistor, a parasitic diode having an opposite polarity against a parasitic diode formed between a drain region and a channel region is formed in series between a source region and the channel region. Accordingly, a compound parasitic diode having a bidirectional polarity made up of two parasitic diodes with their cathodes or anodes facing each other is formed. Therefore, if an output circuit is to be constructed of an FD type SOI-MOS transistor, the electrostatic surge applied to the drain through an output terminal has to pass through not only the parasitic diode in the forward direction but also through the parasitic diode in the opposite direction at the same time. Generally, with respect to the FD type SOI-MOS transistor, the degree of damage resistance when the electrostatic surge is applied in the opposite direction of the parasitic diode is about 1/10 to 1/100 of that when the electrostatic surge is applied in the forward direction (proved by HBM testing). Therefore, with respect to the FD type SOI-MOS transistor, because its typical structure has a compound parasitic diode, its damage resistance against electrostatic surge is rather low.
As mentioned above, the semiconductor device as disclosed in the patent reference functions to discharge electrostatic surge by having a thyristor type protection element connected between a MOS transistor that forms an input circuit and an external input terminal, but it does not function to discharge electrostatic surge using a parasitic diode formed within the structure of the MOS transistor.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved semiconductor device having an ESD protection function and an ESD protection circuit which can be formed in such semiconductor device. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure
USPTO Backgrounds
USPTO Backgrounds