Super-junction structures are more and more attractive due to higher breakdown voltage and lower specific Rds (drain-source resistance). As is known to all, a super-junction structure is implemented by p type column structures and n type column structures arranged in parallel and connecting to each other onto a heavily doped substrate, however, the manufacturing yield is not stable because the super-junction structure is very sensitive to the fabrication processes and conditions such as: the p type column structures and n type column structures dopant re-diffusion issue induced by subsequent thermal processes; trapped charges within the column structures, etc. . . . . All that will cause a hazardous condition of charges imbalance to the super-junction structure. More specifically, these undesired influences become more pronounced with a narrower column structure width for a lower bias voltage ranging under 200V.
U.S. Pat. No. 7,601,597 disclosed a method to avoid the aforementioned p type column structure and n type structure dopant re-diffusion issue, for example, in an N-channel super-junction trench MOSFET (Metal Oxide Semiconductor Field Effect Transistor, the same herein after) as shown in FIG. 1, by setting up the p type column formation process in a deep trench at a last step after all diffusion processes such as: sacrificial oxidation after trench etch, gate oxidation, P body region formation and n+ source region formation, etc have been finished.
However, in order to achieve a shorter growth time of the p type epitaxial layer without having void formation in the deep trenches, a greater CD (Critical Dimension) is required, e.g., trench width of the deep trench must be greater than 4.0 um if the deep trench having 40 um depth. On the other hand, the deep trench filled with p type epitaxial layer and having a greater trench width will occupy a large amount of active areas, causing high specific Rds.
Moreover, other factors such as: the charges imbalance caused by the trapped charges within the column structure is still not resolved.
Therefore, there is still a need in the art of the semiconductor power device, particularly for super-junction design and fabrication, to provide a novel cell structure, device configuration that would resolve these difficulties and design limitations.
USPTO Backgrounds
USPTO Backgrounds