1. Field of the Invention
The present invention relates to a multi-chip module and, more particularly, to a multi-chip module that includes one or more interconnect dies for interconnecting integrated circuit (IC) dies in the multi-chip module and for interconnecting the IC dies to the leads of the multi-chip module.
2. Description of the Prior Art
Operation speed continues to be one of the main selling points for electronic systems, such as computers and other data processing equipment. Increases in operation speed lead to expanded capabilities in graphics, communications, and database applications, to name just a few. One way of increasing the operation speed of an electronic system is to increase the speed of the IC dies used in the electronic system. To date, a great deal of effort has been focused on developing improved designs and architectures for increasing the operation speed of the IC dies.
Several factors besides IC die design affect operation speed in modem electronic systems. For a given architecture, the temperature at which an IC die is operated affects its operation speed. In general, a cool IC die may be reliably operated at higher speeds than a hot IC die. Modern high speed dies have demanding cooling requirements, and future designs are likely to be even more demanding. Accordingly, the ability to cool IC dies is an important factor in obtaining reliable, high speed operations of electronic systems.
In addition, as the operation speeds of IC dies increase, the propagation delay of signals passing between IC dies in the electronic system becomes significant. Propagation delay increases as the length of the wiring path between IC dies increases. However, simply locating IC dies closer together to reduce the wiring path between the IC dies presents several difficulties. For one thing, configurations with a high concentration of IC dies are difficult to cool. Therefore, any reduction in propagation delay may be more than offset by a reduction in the operating speed of the IC dies.
Multi-chip modules, which are sometimes referred to as multi-chip carriers, have been proposed as a way to miniaturize electronic systems. Multi-chip modules are semiconductor die carriers that house multiple semiconductor IC dies. The multi-chip modules generally include an insulative housing that protects and supports the IC dies and a plurality of leads that extend from the housing to couple electrical signals to and from the IC dies. The IC dies are active components, such as a microprocessor die and a static random access memory (SRAM) die.
In conventional multi-chip modules, the insulative housing holds the IC dies in one of two different arrangements. In a first arrangement, the IC dies are mounted back-to-back to an insulative substrate. Alternatively, the IC dies are mounted side-by-side on a planar substrate.
The back-to-back arrangement has several deficiencies. For example, the back-to-back arrangement limits the number of IC dies that may be housed in a single package. In addition, the back-to-back arrangement does not permit efficient interconnection between the IC dies within the housing or the efficient transfer of heat away from the IC dies. Moreover, in the back-to-back arrangement, the back of the dies are mounted to the interior of the module. This effectively traps heat in the module and, thus, limits the operation speed of the IC dies.
In the side-by-side arrangement, the IC dies in the multi-chip module are interconnected by a multilayer ceramic or multilayer printed circuit board (PCB) interconnectors. However, the ceramic and PCB interconnectors are relatively expensive to manufacture. In addition, these interconnectors typically require numerous layers, which not only adds to the expense, but block the transfer of heat from the IC dies to the exterior of the multi-chip module, thereby preventing effective cooling of the IC dies. Because these interconnectors typically require numerous layers PCB size, as well as pad and trace size become an issue.
Accordingly, there exists a need in the art to provide an economical multi-chip module that supports high speed applications.
USPTO Backgrounds
USPTO Backgrounds