With the continued scaling of metal-oxide semiconductor (MOS) circuits, technical challenges arise. For example, there is a point beyond which the gate oxide thickness cannot be reduced due to the increase in leakage current that is experienced. As a result, this limitation on gate oxide thickness can lead to short channel effects which degrade performance of the device. Non-uniform doping profiles using angled halo or extension implants have been employed to reduce these short channel effects.
However, as device pitch is further scaled, problems arise regarding angled halo/extension implants and the effect adjacent devices have in shielding and thus preventing proper use of this technique. For example, angled halo or extension implants are generally performed at a 20 degree to 30 degree tilt angle. However with small gate-to-gate spacing (tight pitch) the gates from adjacent devices prevent the angled implant from being performed (i.e., due to shielding).
Therefore, techniques for fabricating asymmetric field-effect transistor (FET) devices at a dense pitch would be desirable.
USPTO Backgrounds
USPTO Backgrounds