1. Field of the Invention
This invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device having a hollow multi-layered lead structure supported by columns formed on a semiconductor substrate.
2. Description of the Prior Art
In recent years, a large number of ICs (integrated circuit) superior in high-speed operation characteristics have been used for supercomputers and communication systems. To achieve the high-speed operation characteristics, such ICs have been improved in terms of element structures. Particularly, the hollow multi-layered leads have been developed to effectively reduce distributed capacity between the leads.
A conventional IC having as hollow multi-layered lead structure will be described in the order of manufacturing processes with reference to cross-sectional views of FIGS. 7A through 7E. In FIG. 7A, an MOS-type field-effect transistor (MOS-FET) 13 and a diffusion layer 14 are formed in a region surrounded by a field insulating film 12 on a silicon substrate 11. An SiO.sub.2 film which becomes a first interlayer insulating film 15a is formed on the entire surface of the substrate 11. First, second and third openings, 16a, 16b and 16c are made in the insulting film 15a at positions corresponding respectively to the MOS-FET 13, the field insulating film 12 and the diffusion layer 14.
Next, Al is deposited on the entire surface of the substrate 11, and the thus deposited Al is selectively eliminated leaving prescribed portions. As a result, a first lead layer 17a is formed on the substrate 11, as shown in FIG. 7B. Specifically, the first lead layer 17a is formed in the openings 16a, 16b and 16c, and on the surface of the first interlayer insulting film 15a. Thus, the first lead layer 17a is connected to the MOS-FET 13 and the diffusion layer 14 so as to form first and second contact portions 18a and 18b. Further, the first lead layer 17a reaches the surface of the field insulating film 12 piercing through the second opening 16b, and constitutes a first lead supporting column 19a.
Thereafter, an SiO.sub.2 film is deposited on the entire surface of the substrate 11, and then a second interlayer insulating film 15b is formed, as shown in FIG. 7c. Further, fourth, fifth and sixth openings 16d, 16e and 16f are made in the second interlayer insulating film 15b so as to expose the surfaces of the field insulting film 12 and the first lead layer 17a. The fourth opening 16d penetrates not only through the second interlayer insulating film 15b, but also the first interlayer insulating film 15a. Thus the fourth opening 16d is deeper than the fifth and sixth openings 16e and 16f.
Next Al is deposited on the entire surface of the substrate 11, and then a second lead layer 17b is formed, as shown in FIG. 7D. Specifically, the second lead layer 17b constitutes third and fourth contact portions 18c and 18d piercing through the fifth and sixth openings 16e and 16f. Further, the layer 17b constitutes a second lead-supporting column 19b piercing through the fourth opening 16d. However, the fourth opening 16d is deeper than the fifth and sixth openings 16e and 16f. Thus Al does not reach the bottom of the fourth opening 16d. In other words, the fourth opening 16d cannot be completely filled up with the Al.
Finally, the first and second interlayer insulating films 15a and 15b are eliminated by etching. As a result, a hollow multi-layered lead structure can be completed, as shown in FIG. 7E. In this structure, space between the multi-layered leads is filled with a vacuum, or gas having a low dielectric constant. Thus, the lead capacitance can be reduced, and this is advantageous to achieve the high-speed operation characteristics of ICs.
However, the above-described conventional hollow multi-layered lead structure has the following disdavantages. Specifically, the first and second lead layers 17a and 17b are generally being exposed to a gas or gases having a low thermal conductivity. Thus, it is difficult to effectively radiate the head generated in operation. Particularly, the heat generated concentrically in cavity portions A, B and C (encircled by the dotted lines) cannot be easily radiated. In other words, the cross-sectional areas of leads in this region decrease, thus increasing the resistance thereof. As a result, the portions A, B and C are locally heated and reach a high temperature, potentially resulting in the melt between the second lead layer 17b and the second lead-supporting column 19b. In the worst case, the second lead layer 17b per se would be disconnected.
Moreover, the Al cannot reach the bottom of the opening 16d which is deeper than other openings 16e and 16f. Thus, the Al is missing from the lower portion of the second lead-supporting column 19b, as shown in FIG. 7E. Thus, the column 19b can no longer support the second lead layer 17b. As a result, the second lead layer 17b is inevitably bent, and short-circuited to the first lead layer 17a. The missing of Al becomes significant as the number of multi-layers increases.
USPTO Backgrounds
USPTO Backgrounds