The present invention relates to a liquid crystal display device providing a multi tone control function capable of regulating stepwise the display brightness, in accordance with the voltage applied thereto, and in particular to a method of driving a liquid crystal display device capable of providing a multi-colored display of at least 9 colors with analogue display data input.
A prior art liquid crystal display device used a liquid crystal controller such as HD63645F fabricated by HITACHI, etc.; gave liquid crystal display means such as HD61104 fabricated by HITACHI, etc. image data read out from a display memory storing such image data, which are to be displayed; and displayed the image by taking-in the given image data for every line in the horizontal direction of the image in the liquid crystal display device to output them to a liquid crystal panel. However, such a prior art liquid crystal display device dealt with input data as digital signals; expressed display-on and display-off by 1 and 0; related to a black and white display or a colored display of up to 8 colors; and didn't take any multi-colored display with at least 9 colors into account.
As a prior art liquid crystal display device there is known a "color liquid crystal display device" disclosed in JP-A-Sho62-203131.
This utilizes an S/P converting circuit and a P/S converting circuit in order to arrange display data at writing and reading the data in and from a memory circuit.
Further it utilizes an S/P converting circuit in order to make the bit width uniform in an input interface to an X electrode driving circuit. This doesn't deal with display data represented in an analogue manner.
Furthermore a "video signal transforming circuit" disclosed in JP-A-Sho63-181589 treats the display data through a memory circuit, and no driving method for displaying the display data after treatment in a liquid crystal panel is disclosed.
The prior art liquid crystal display device will be explained in a general way, referring to FIGS. 1 to 4.
FIG. 1 is a block diagram showing the prior art liquid crystal display device, in which reference numeral 100 is a liquid crystal controller; 101 is address producing means; 102 is a memory address output; and 103 is image storing means storing data to be displayed (hereinbelow called display memory). 104 represents a display data output from the display memory 103 as a result of the memory address 102, which display data have a data width of 8 bits. 105 is data output means; 107 is a horizontal clock signal; and 108 is a line start clock signal, all of them being produced by the address producing means 101. 109 represents the liquid crystal display data having a 4-bit width synchronized with the data shift clock signal 106. 200 is X (axis direction) driving means; 201 is line liquid crystal display data signal; 114 is Y (axis direction) driving means; 115 is display line data signal; and 116 is a liquid crystal panel, which is driven by the X driving means 200 and the Y driving means 114 to display the display data in a liquid crystal display.
FIG. 2 is a block diagram showing in detail the construction of the X driving means 200 in the prior art liquid crystal display device indicated in FIG. 1.
In FIG. 2, 300 is data shift means taking-in the liquid crystal display data 109 for one line by using the shift clock signal 106; 301 represents shift data, which are an output of the data shift means; and 302 is one-line latch means latching the shift data 301 by using the horizontal clock signal 107. X-D1 to X-D640 represent one-line liquid crystal data 201, when 1 line is dotted in 640 on a liquid crystal display screen.
FIG. 3 is a timing chart relating to the operation, when the X driving means 200 and the Y driving means 114 drive the liquid crystal panel 116 in FIG. 1.
In FIG. 3, (a) indicates the horizontal clock 107, which is a clock signal generated for every horizontal scanning priod on the display screen, in sychronism therewith, (b) indicates the data shift clock signal 106, which is a clock having a repetition frequency significantly higher than the horizontal clock 107 and which is used for shifting the liquid crystal display data 109 taken in the data shift means 300 indicated in FIG. 2 within the data shift means 300. (c) is a timing chart indicating the liquid crystal display data 109. After the liquid crystal display data 109 have been formed, there are indicated 160 sets of display data from 1 to 160 (160.times.4 bits=640 dots), each of which is synchronized with the data shift clock signal 106.
(d) indicates the same horizontal clock 107 as (a), but the time scale is smaller than in (a). (e) shows that the data sets of the 1st line, the 2nd line, the 3rd line, etc. in the 1-line liquid crystal display data X-D1 to x-D640 are synchronized with the horizontal clock 107. (f), (g) and (h) show display line data 115 outputted by the Y driving means 114. That is, (f) indicates the display line data Y-D1 indicating to display the 1st line; (g) indicates the display line data Y-D2 indicating to display the 2nd line; and (h) indicates the display line data Y-D3 indicating to display the 3rd line.
FIG. 4 illustrates the relation between the 4-bit parallel display data 109 in FIG. 3 and the position of display pixels on the liquid crystal panel 116.
In FIG. 4, the liquid crystal display data 109 are 160 sets (160.times.4 bits=640 bits) of display data from 1 to 160, which correspond to pixels in units of 4 bits from the left end of the screen of the liquid crystal panel 116.
Hereinbelow, in order to explain the operation thereof, FIG. 1 is referred to again.
In FIG. 1, image information, which have been stored in the display memory 103, are read out according to the memory address 102 produced by the address producing means 101 and are transformed into the memory display data 104 having a 8-bit width. These memory display data 104 are inputted to the data output means 105 and converted into data having a 4-bit width in accordance with the interface on the liquid crystal panel side. The converted 4-bit data are outputted from the data output means 105 as the liquid crystal display data 109.
The liquid crystal display data 109 is given to the X driving means 200 together with the data shift clock 106 and the horizontal clock 107, while the horizontal clock 107 and the line start clock 108 are given to the Y driving means 114. In this way the liquid crystal data 109 are displayed on the liquid crystal panel 116.
The operation of the X driving means 200 and the Y driving means 114 will be explained below, referring to FIGS. 2 and 3.
As seen in FIG. 3, according to the data shift clock 106, the data shift means 300 indicated in FIG. 2 takes-in 160 sets of the display data, i.e. 640 dots (160.times.4 dots) of data in one horizontal period after the output of the first horizontal clock 107 for the beginning of the display and outputs them as the shift data 301. These shift data 301 are latched by the one-line latch means 302 in accordance with the horizontal clock 107 to form the one-line data 201 (X-D1 to X-D640). That is, the X driving means 200 outputs the data preceding the line by one line in the liquid crystal display data 109, which are taken at that time in the data shift means 300, as the one-line data 201, from the one-line latch means 302 to the liquid crystal 116. The one-line data 201 are displayed on the liquid crystal panel 116 for the lines, which are at "high (H)" in the display line data 115 (refer to (f) and (g) in FIG. 3), which are the output of the Y driving means 114.
The Y driving means 114 makes the first line Y-D1 of the liquid crystal panel 116 "high (H)" by taking-in the line start clock 108 in accordance with the horizontal clock 107 and shifts the line, which is "high (H)", in the order of the second line Y-D2, the third line Y-D3, and so forth, every time a horizontal clock 107 is inputted. Consequently, as seen in FIG. 3, when the X driving means 200 outputs the one-line data 201 of the first line, the Y driving means 114 makes Y-D1 in the display line data 115 "high (H)" and when the X driving means 200 outputs the one-line data 201 of the second line, the Y driving means 114 makes Y-D2 in the display line data "high (H)". When the line liquid crystal display data 201 for each of the pixels are "high (H)", the operation of display-on is executed and when they are "low (L)", the operation of display-off is executed. In this way the display data are displayed on the liquid crystal display panel 116 in the form of letters, figures, etc.
By the prior art technique described above, display data were digital signals and the black and white display, by which the display was either turned on or off, was determined by the level of the signals, either "high (H)" or "low (L)". Thus no multi-colored (multi tone) display of at least 9 colors using analogue signals as the display data was taken into account.
USPTO Backgrounds
USPTO Backgrounds