1. Field of the Invention
The present invention relates generally to static electricity protection circuits for protecting internal circuits of an integrated circuit apparatus such as an LSI from being damaged by static electricity and, more particularly, to static electricity protection circuits employed for an integrated circuit apparatus including internal circuits connected to a plurality of power sources.
2. Description of the Background Art
In such cases that a charged human body, a charged object or the like contacts a lead (an external terminal) of an integrated circuit apparatus such as an LSI and that a charged integrated circuit apparatus contacts a conductor, it is known that internal circuits of the integrated circuit apparatus are damaged by charge/discharge of the integrated circuit apparatus, which results from application of static electricity to the apparatus.
FIG. 1A is a diagram illustrating an input terminal and its vicinity in the LSI, which receives an input signal to be transmitted to an internal circuit via a predetermined lead. Referring to FIG. 1A, an input signal to the LSI 1 is in general applied to the gate of an MOS transistor Tr1 in the internal circuit 10 via the input terminal IN connected to the predetermined lead (not shown) and via a resistor 11. That is, the input terminal IN and the gate of the transistor Tr1 are connected via the resistor 11. Thus, static electricity applied to the lead connected to the input terminal IN is applied to the gate of the transistor Tr1 via the input terminal IN and the resistor 11.
FIG. 1B is a sectional view illustrating a general structure of an N channel MOS transistor formed in a P.sup.- substrate 100. Referring to this figure, a gate G of the MOS transistor is in general formed of an oxide film. The gate oxide film G of the MOS transistor has a breakdown voltage of ten to several tens V. Thus, as illustrated in FIG. 1A, when a high voltage higher than or equal to the above breakdown voltage is applied to the gate G of the transistor Tr1 due to the application of static electricity from the lead to the input terminal IN, a lower portion of the gate oxide film G (shown by the arrow in FIG. 1B) is destroyed.
FIG. 2A is a diagram illustrating an output terminal and its vicinity in the LSI, which provides an output signal from the internal circuit to a predetermined lead. Referring to this figure, the output signal from the internal circuit 10 is generally taken out from a connecting point of MOS transistors Tr2 and Tr3 of the internal circuit 10 and provided to the predetermined lead via a resistor 12 and an output terminal OUT. That is, the output terminal OUT is connected to the connecting point of the transistors Tr2 and Tr3 via the resistor 12. Therefore, static electricity applied to the lead connected to the output terminal OUT is applied to the connecting point of the transistors Tr2 and Tr3 in the internal circuit 10 via the output terminal OUT and the resistor 12.
FIG. 2B is a sectional view illustrating a structure of a portion in which two N channel MOS transistors formed on the P.sup.- substrate 100 are connected in series. Referring to this figure, the connecting point of the these two MOS transistors corresponds to an N.sup.+ diffusion layer region forming a source S (or a drain D) of one of the transistors and the source S (or the drain D) of the other transistor Tr3 in common. A breakdown voltage of an PN junction is generally ten to several tens V. Accordingly, when a high voltage higher than or equal to the above breakdown voltage is applied to the connecting point of the transistors Tr2 and Tr3 due to application of static electricity from the lead to the output terminal OUT, in FIG. 2A, a junction portion of the N.sup.+ region and the P.sup.- substrate 100 (shown by the arrow in FIG. 2B) is destroyed.
As described above, destruction of the internal circuit is possible due to the application of static electricity to the input/output terminal of the LSI via the lead. The magnitude of the static electricity applied to the integrated circuit apparatus is totally different depending on an environment in which the apparatus is used, but is in general in the order of several hundreds to several thousands V. Particularly, it is significantly possible that a considerably large magnitude of static electricity is applied to integrated circuit apparatuses employed for automobiles and IC cards. Thus, it is highly possible that the internal circuit of the integrated circuit apparatus employed in such an environment is destroyed by static electricity.
FIG. 3 is a model diagram illustrating a phenomenon where static electricity is applied to the lead of the integrated circuit apparatus such as LSI.
Referring to FIG. 3, with the charged human body or charged object regarded as a capacitor storing a certain amount of charges, a phenomenon that the charged human body or object contacts a certain lead L1, connected to an internal circuit 10 of the LSI 1 and serving to input/output a signal, is equivalent to the event that a charged capacitor C is connected between the lead L1 and the ground. For example, in the case that a positive charge is stored in the capacitor C, a high voltage +V of a positive polarity is applied to the internal circuit 10 of the LSI 1 via the leads L1. On the other hand, in the case that a negative charge is stored in the capacitor C, a high voltage -V of a negative polarity is similarly applied to the internal circuit 10 of the LSI via the lead L1.
Therefore, in order to prevent such static electricity from being directly applied to the internal circuit 10 of the LSI 1, a charge applied from the capacitor C to the lead L1 may be neutralized with a charge of opposite polarity thereto before being inputted to the internal circuit 10. Meanwhile, the same amount of charges with opposite polarities are induced in both plates of the charged capacitor C. Thus, in order to prevent the charge applied from one of the plates of the capacitor C to the lead L1 from being applied to the internal circuit 10, the lead L1 and the other plate of the capacitor C may electrically be connected to each other in application of static electricity so that the charge applied to the lead L1 may return to the other plate of the capacitor C through other paths than the input/output path of a signal in the internal circuit 10. In general, the other plate of the capacitor C, i.e., a reference potential terminal of an electrostatic source is a power source for driving the LSI 1. Therefore, in order to electrically connect the lead L1 to the other plate of the capacitor C, the lead L1 and a lead L2, which connects the LSI 1 to the power source, may electrically be connected to each other in the LSI 1. That is, by forming a closed loop which electrically connects both plates of the capacitor C (the electrostatic source) in the LSI 1, in application of static electricity, and then combining the static electricity applied to the LSI 1 with a charge of opposite polarity thereto at the lead L2 side (the above described power source), the inner circuit 10 can be protected from being applied by the static electricity.
Thus, static electricity protection circuit for forming the described closed loop is provided for each input/output terminal, which is connected to the internal circuit for serving to input/output a signal in the integrated circuit apparatus such as an LSI, in order to prevent damage of the internal circuit due to the static electricity. Furthermore, the static electricity protection circuit, which is the same as the one provided in the LSI connected to one power source, is independently provided for each power source in the LSI connected to a plurality of power sources.
FIG. 4 is a diagram illustrating one example of an inner configuration of an LSI connected to two power sources, including conventional static electricity protection circuits.
Referring to FIG. 4, the LSI 1 includes internal circuits A and B. The internal circuit A is provided between a power source terminal V.sub.CCA and a ground terminal GND.sub.A, connected respectively to a higher potential side and a lower potential side (which is a ground potential) of one of the power sources, and forms an appropriate current path l.sub.A connecting this power source terminal V.sub.CCA and the ground terminal GND.sub.A. Similarly, the internal circuit B is provided between a power source terminal V.sub.CCB and a ground terminal GND.sub.B, connected respectively to a higher potential side and a lower potential side (which is a ground potential) of the other power source, and forms an appropriate current path l.sub.B connecting this power source terminal V.sub.CCB and the ground terminal GND.sub.B. In addition, the receiving/sending of a predetermined signal is only carried out between the internal circuits A and B. That is, the power source terminals V.sub.CCA and V.sub.CCB, and the ground terminals GND.sub.A and GND.sub.B are electrically isolated from each other, respectively, and the current paths l.sub.A and l.sub.B in the respective internal circuits A and B are independent of each other. This electrical isolation of the different power sources is carried out in the case of different voltages of the power sources, or in order to prevent power source noise or GND noise, which occurs in one of a plurality of internal circuits connected to the different power sources from being propagated to the other internal circuit.
In operation, n (n=1, 2, 3 ...) input terminals IN.sub.l -IN.sub.n, which are externally supplied with a potential lower than the potential of the power source terminal V.sub.CCA but higher than the potential of the ground terminal GND.sub.A are connected respectively via static electricity protection circuits EC.sub.Al -EC.sub.An to the internal circuit A. In operation, m (m=1, 2, 3 ...) output terminals OUT.sub.l -OUT.sub.m, which are supplied from the circuit B with a potential lower than the potential of the power source terminal V.sub.CCB but higher than the potential of the ground terminal GND.sub.B are connected respectively via static electricity protection circuits EC.sub.Bl -EC.sub.Bm to the internal circuit B.
Each static electricity protection circuit EC.sub.Ai (i represents an integer of l to n) includes a resistor R.sub.Ai provided between the input terminal IN.sub.i and the internal circuit A, a diode D.sub.Ai1 provided between a terminal of the resistor R.sub.Ai at the internal circuit A side and the power source terminal V.sub.CCA to be reverse-biased, and a diode D.sub.Ai2 provided between the terminal of the resistor R.sub.Ai at the internal circuit A side and the ground terminal GND.sub.A to be reverse-biased.
Similarly, each static electricity protection circuit EC.sub.Bj (the j represents an integer of l to m) includes a resistor R.sub.Bj provided between the output terminal OUTj and the internal circuit B, a diode D.sub.Bj1 provided between a terminal of the resistor R.sub.Bj at the internal circuit B side and the power source terminal V.sub.CCB to be reverse-biased, and a diode D.sub.Bj2 provided between the terminal of the resistor R.sub.Bj at the internal circuit B side and the ground terminal GND.sub.B to be reverse-biased.
A description will be given on the operation of the static electricity protection circuits EC.sub.Al -E.sub.An and EC.sub.Bl -EC.sub.Bm with reference to FIG. 5. FIG. 5 is a model diagram illustrating a state that static electricity is applied to the LSI 1 illustrated in FIG. 4.
In the above LSI 1, when static electricity of a positive charge is applied to any input terminal IN.sub.i with respect to the power source terminal V.sub.CCA or the ground terminal GND.sub.A as a reference, the diode DA.sub.i1 is forward-biased to be conductive in the static electricity protection circuit EC.sub.Ai, and thus a current path from the input terminal IN.sub.i to the power source terminal V.sub.CCA is established by the resistor R.sub.Ai and the diode D.sub.Ai1. Conversely, when static electricity of a negative charge is applied to any input terminal IN.sub.i with respect to the power source terminal V.sub.CCA or the ground terminal GND.sub.A as reference, the diode D.sub.Ai2 is forward-biased to be conductive in the static electricity protection circuit EC.sub.Ai, and thus a current path from the ground terminal GND.sub.A to the input terminal IN.sub.i is established by the resistor R.sub.Ai and the diode D.sub.Ai2. As a result, even if static electricity is applied to the input terminal IN.sub.i, a high voltage is not applied to a signal input portion in the internal circuit A (the gate of the transistor Tr1 in FIG. 1A) or to a signal output portion (the connecting point of the transistors Tr2 and Tr3 in FIG. 2A).
For example, in the case that a positive charge is applied to the input terminal IN.sub.1 with respect to the power source terminal V.sub.CCA as a reference, i.e., the case that a capacitor C1 storing a positive charge +V is connected between the power source terminal V.sub.CCA and the input terminal IN.sub.1 as illustrated in FIG. 5, the diode D.sub.A11 becomes conductive. The positive charge applied to the input terminal IN.sub.1 is then applied via the resistor R.sub.A1 and the diode D.sub.A11 to the power source terminal V.sub.CCA, connected to the reference potential side of the electrostatic source, at which the same amount of a negative charge -V as the positive charge is induced. The applied positive charge then combines with the negative charge -V at the power source terminal V.sub.CCA. That is, the positive charge applied to the input terminal IN.sub.1 seems to be absorbed in the static electricity protection circuit EC.sub.A1.
Conversely, where a negative charge is applied to the input terminal IN.sub.1 with respect to the power source terminal V.sub.CCA as a reference, the diode D.sub.A12 becomes conductive. Thus the applied negative charge is applied via the resistor R.sub.A1. The diode D.sub.A12 and the current path l.sub.A in the internal circuit A to the power source terminal V.sub.CCA, which is the reference potential terminal of the electrostatic source, and then combines with a charge of the opposite polarity therein. Therefore, the positive and negative charges applied to the input terminal IN are absorbed in the power source V.sub.CCA or the ground terminal GND.sub.A, but not applied to the internal circuit A. Also where static electricity is applied to the input terminal IN.sub.1 with respect to the ground terminal GND.sub.A as a reference, the applied static electricity is removed in the same manner as in the above case. That is, the static electricity protection circuit EC.sub.Ai protects the inner circuit A against the static electricity applied to the input terminal IN.sub.i.
Similarly, with application of a positive charge to any output terminal OUT.sub.j with respect to the power source terminal V.sub.CCB or the ground terminal GND.sub.B as a reference, the diode D.sub.Bj1 is forward-biased to be conductive in the static electricity protection circuit EC.sub.Bj, and thus a current path from the output terminal OUT.sub.j to the power source terminal V.sub.CCB is established by the resistor R.sub.Bj and the diode D.sub.Bj1. Conversely, where a negative charge is applied to any output terminal OUT.sub.j with respect to the power source terminal V.sub.CCB or the ground terminal GND.sub.B as a reference, the diode D.sub.Bj2 is forward-biased to be conductive in the static electricity protection circuit EC.sub.Bj, and thus a current path from the ground terminal GND.sub.B to the output terminal OUT.sub.j is established by the resistor R.sub.Bj and the diode D.sub.Bj2. Therefore, the positive and negative charges applied to the output terminal OUT.sub.j are absorbed in the power source terminal V.sub.CCB or the ground terminal GND.sub.B, but not applied to the internal circuit B. That is, the static electricity protection circuit EC.sub.Bj protects the inner circuit against the static electricity applied to the output terminal OUT.sub.j.
However, the static electricity protection circuit EC.sub.Ai or EC.sub.Bj, which is of the same configuration as the static electricity protection circuit provided in the LSI connected to one power source, is independently provided for each power source. Accordingly, with employment of such a conventional static electricity protection circuit for the LSI connected to the plurality of power sources, the plural power sources are electrically isolated from one another, so that it is difficult to protect all the inner circuits against the applied static electricity with respect to the power source terminals and the ground terminals connected to the respective power sources as references.
Namely, referring to FIG. 5, in case that static electricity is applied to any input terminal IN.sub.i with respect to the power source terminal V.sub.CCB or the ground terminal GND.sub.B of the internal circuit B as a reference, even if one of the diodes D.sub.Ai1 and D.sub.Ai2 is conductive in the protection circuit EC.sub.Ai, no current path is established from the input terminal IN.sub.i to either the power source terminal V.sub.CCB or the ground terminal GND.sub.B, being the reference potential terminal of the electrostatic source. The static electricity applied to the input terminal IN.sub.i is not combined but directly applied to the internal circuit A. That is, the internal circuit A cannot be protected against the static electricity.
For example, where a positive charge is applied to the input terminal IN.sub.1 with respect to the power source terminal V.sub.CCB as a reference, i e., where a capacitor C2 for storing a positive charge +V is connected between the input terminal IN.sub.1 and the power source terminal V.sub.CCB, the diode D.sub.A11 becomes conductive, and thus the positive charge +V applied to the input terminal IN.sub.1 is applied to the power source terminal V.sub.CCA and to the ground terminal GND.sub.A via the current path l.sub.A in the internal circuit A. However, the applied positive charge is not removed but directly applied to the internal circuit A because a charge of the opposite polarity, which can be completely combined with the positive charge, does not exist at the power source terminal V.sub.CCA or at the ground terminal GND.sub.A.
On the other hand, where static electricity is applied to any output terminal OUT.sub.j with respect to the power source terminal V.sub.CCA or the ground terminal GND.sub.A of the internal circuit A as a reference, even if either the diode D.sub.Bj1 or D.sub.Bj2 becomes conductive, no current path is established from the output terminal OUT.sub.j to the power source terminal V.sub.CCA or to the ground terminal GND.sub.A. Therefore, the static electricity applied to the output terminal OUT.sub.j is applied to the internal circuit B directly. That is, the internal circuit B cannot be protected against the static electricity.
As described above, where static electricity is applied to the input terminal IN.sub.i or the output terminal OUT.sub.j with respect to a different power source from the one connected to the input/output terminal as a reference, no current path is established between the input/output terminal and the reference potential terminal of the electrostatic source, so that the applied static electricity is not absorbed in either the static electricity protection circuit EC.sub.Ai or EC.sub.Bj. Therefore, the internal circuit A or B is in danger of being damaged in the above case.
USPTO Backgrounds
USPTO Backgrounds