It is known to create electrical interconnection layers. Printed circuit boards are such an example of fabricating electrical interconnect layers between electrical insulating layers to form rigid electrical interconnect systems. It is also known to create electrical interconnections between layers of electrical insulating layers to form flexible interconnect systems, such as, for example, flexible printed circuits. The rigidity or flexibility of the resulting circuits is dependent on the choice of design, features, materials and processes used.
Flexible printed circuits have found applicability in numerous applications. One such application is in magnetic resonance imaging equipment. Magnetic resonance imaging (MRI) equipment uses radio frequency coils to scan a body. The coils include a conductive loop and in-series capacitors. It often is necessary to form the radio frequency coils of an MRI device on a flexible substrate, due to the many varied applications in which such a device is used and the desire to maximize performance by conforming the device to the non-planar patient anatomy.
It is known to provide such radio frequency coils on a flexible substrate. Prior methods for doing so generally include providing traditionally applied circuitry on relatively expensive polymeric substrates and utilizing a subtractive process to arrive at a finished coil. Such prior methods are wasteful and environmentally troubling. Specifically, such prior methods subtract away copper applied on the substrate. The cost of copper is increasing, which has led to an increase in the cost to manufacture MRI coils. Further, chemicals that can adversely impact the environment are utilized in the known fabrication processes.
With particular attention to FIG. 1, there is shown a process diagram illustrating a known method of fabricating interconnect devices. At step 500, starting materials are gathered, such as a flexible circuit board. In one example, a copper clad laminate board (e.g., FR Dupont) is used which can be 1 oz Cu/5 mil PI/1 oz Cu.
At step 505, vias are formed in the substrate through known means, such as, for example, through a mechanical drill, a chemical etching process, or a laser punch. Typically, the vias are 11-22 mil size. Further, any one of known printing methods is then utilized to make electrically conductive the vias thus formed. Examples of such printing methods include crossed conductive traces or filling a via sufficiently to connect to an underlying conductor/trace, and dispensing a conductive material such as paste or ink to create a partially or completely filled via. The latter is sufficient in two metal layer structures. However, that method has limited or no application in multi-layer (three, or more, metal layers). The vias are then, at step 510, de-smeared and cleaned.
At step 515, copper is deposited in an electroless deposition process and baked to cure. For the case where the device is a two metal layer device, the metal layers are connected and then the metal is baked. At step 520, copper plating is provided through an electrolytic plating process. For a two layer device, both sides of the substrate are copper plated. Some devices will be used in certain applications that will require a relatively thicker layer of copper. For example, some applications will require thicknesses of approximately 18 μm, 35 μm, or 75 μm. To achieve such thicknesses, industry standard is to use a starting copper thickness or apply, respectively, one-half an ounce, one ounce, or two ounces of copper.
Next, at step 525, a subtractive portion of the known process begins. Specifically, photolithography patterns are created on both metal layers using resistive material. At step 530, the copper layers are subtractively etched along the patterns. At step 535, remaining photoresist material is removed. This stripping step may require a pH adjustment. Most photoresist removers or stripping agents are basic in nature, i.e., have a pH greater than 7. These photoresist removers or stripping agents can require that the resultant materials on the substrate are further treated with chemistry to neutralize the pH. Thus, for example, if the surface were left with a basic pH, then a mild acid neutralization process may be used.
Step 540, a post-resist stripping and cleaning process step, is followed by lamination step 545. Specifically, a covering material is laminated into place over the substrate. Then, at step 550, any needed finish metal is applied along with laminate stiffeners. The finish metal—metal applied to the copper interconnect for next level assembly or capping of the copper interconnect to prevent oxidation—may be applied through any conventional process, such as, for example, by way of an organic surface protectant (OSP) process, a tinning process, or by way of a hot air solder level (HASL) process. The laminate stiffeners are used to support the substrate. They are typically placed on the backside of the substrate where one would join components to the active side of the substrate metal.
Finally, at step 555, the panel is singulated and required relief and openings are created. Singulation is the process of removing the active circuit from the substrate panel from which it is built. Often multiple circuits can be built in a single panel and they need to be de-panelized.
Although circuits with three, or more layers are produced, most flexible printed circuits include either one metal layer (1ML) or two metal layers (2ML). Most printed circuits that include electrically conductive traces that have been printed to a substrate have an electrical conductivity substantially less than that of copper, e.g., one half to one third the electrical conductivity of copper. Best-in-class flexible printed circuits claim up to one-half the electrical conductivity of copper.
Lower cost and/or large area electric circuits, with electrical performance equivalent to existing commercially available products are desired. These circuits include low cost, high volumes applications, e.g., RFID, smart labling, and sensor patches. As well, these circuits include large area circuits, e.g., lighting, display, and antenna or sensor arrays. Drop-on-demand, screen/stencil, gravure, and other like methods have been developed, utilized, or optimized to satisfy the need for low cost, large area printed electric interconnect, circuits and systems. These printing methods are compatible with producing either rigid or flexible electrical interconnect systems. However, due to limitations of the electrical properties of the materials used in these printed circuits, electrical performance parity with circuits fabricated using conventional methods and materials has not been achieved.
What is desired are improved interconnect devices, such as flexible printed circuits, and methods of fabricating the same. Such improved interconnect devices would include electrical interconnections having electrical conductivity greater than half that of copper. Such improved methods would desirably address the waste inherent in known methods as well as the adverse environmental impact of known methods.
USPTO Backgrounds
USPTO Backgrounds