1. Field of the Invention
The invention relates to a physical quantity detecting device for detecting a physical quantity supplied from the outside, to a method of driving the physical quantity detecting device, and to an imaging apparatus using a solid-state imaging device for detecting light incident from the outside as a physical quantity.
2. Description of the Related Art
A solid-state imaging device for detecting the intensity of light incident via a subject as a physical quantity or a fingerprint detecting device (capacitance detecting device) for detecting capacitance formed to correspond to a fingerprint between a detecting electrode and the surface of a finger has known as a physical quantity detecting device for detecting a physical quantity supplied from the outside.
For example, in the solid-state imaging device, which is a kind of physical quantity detecting device, in a pixel array having pixels two-dimensionally arranged in a matrix, each including a photoelectric converter, two rows of pixels are scanned at the same time, and signal charges are stored in the pixels in the two rows at different storage times. Then, the difference between the storage times causes two signals having different sensitivities to be generated, and the signals having different sensitivities are synthesized to obtain a wide dynamic range (for example, see the following document: Orly Yadid-Pecht and Eric R. Fossum, “Wide Intrascene Dynamic Range CMOS APS Using Dual Sampling,” IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 44, NO. 10, pp. 1721 to 1723, October 1997).
The related art will be described in detail below. FIG. 12 is a conceptual diagram illustrating the related art. In FIG. 12, two column circuit groups 103 and 104 are arranged above and below a pixel array 102 that has a plurality of pixels 101 two-dimensionally arranged in a matrix, each having a photoelectric converter. In the column circuit groups 103 and 104, a pair of column circuits 103A and 104A are arranged so as to correspond to one column of pixels in the pixel array 102. In FIG. 12, a scanning system for each pixel 101 of the pixel array 102 is not shown.
Two rows of pixels 101 in the pixel array 102 are scanned as read rows A and B at the same time. Since the read row A and the read row B have different storage times, two signals having different sensitivities are obtained. Signals of the pixels in the read row A are read by the column circuit group 103 and are then processed by the column circuits 103A. Signals of the pixels in the read row B are read by the column circuit group 104 and are then processed by the column circuits 104A.
FIG. 13 is a diagram illustrating the operation of the two column circuit groups 103 and 104 within a period of 1H. In FIG. 13, the period of 1H means a period for which one read row A or B is scanned.
First, the column circuit group 103 reads signals from the pixels in the read row A and the column circuits 103A of the column circuit group 103 process the signals and store the processed signals. Then, the column circuit group 104 reads signals from the pixels in the read row B and the column circuits 104A of the column circuit group 104 process the signals and store the processed signals. Thereafter, the column circuit groups 103 and 104 perform horizontal scanning to sequentially read out the signals. When the operation for the period of 1H is terminated, the next read row A and the next read row B are scanned, and this operation is repeatedly performed.
When the column circuits 103A and 104A of the column circuit groups 103 and 104 process the signals in a pipeline manner (in the case of a pipeline type), the following operation is performed.
First, signals are read from the pixels in the read row A to a first stage of each of the column circuit 103A of the column circuit group 103, and signals are read from the pixels in the read row B to a first stage of each of the column circuit 104A of the column circuit group 104. Then, the signal in the first stage of each of the column circuits 103A and 104A is transmitted to a second stage, and then the operation for the period of 1H is terminated. In the next period of 1H, while signals of the next row are read in the first stage of each of the column circuits 103A and 104A, the previous signals are processed in the second stage and the processed signals are transmitted to the next stage. These operations are repeatedly performed, and finally, the signals are horizontally transmitted within a period of 1H.
In the above-mentioned read operations, since two column circuit groups (103 and 104) are provided for each column of pixels, signals corresponding to two rows of pixels are processed within a period of 1H (the latter is similar to the former in that signals corresponding to two rows of pixels are processed within a period of 1H regardless of whether the time from input to output is several times longer than the period of 1H).
USPTO Backgrounds
USPTO Backgrounds