1. Technical Field
The present invention relates to semiconductor devices and fabrication, and more particularly to methods and devices having nanowires or nanoribbons formed by stress-induced crack propagation of two-dimensional materials, such as graphene.
2. Description of the Related Art
Nanowires are fabricated to increase surface area relative to volume in many applications, such as, in applications where absorption of radiation is of interest. Conventional methods for fabricating nanowires (NWs) may include different forms of lithography (e.g., E-beam lithography, photolithography, etc.). While effective, these processes are expensive and difficult to control, especially for sizes less than 20 nm. In addition to being cost-inefficient, lithography is extremely low throughput and prone to line-edge roughness, which results in a large scattering effect for carrier transport. Also, damage from dry etching processes leads to surface defects in the nanowires, poor electrical properties and low throughput.
Another process includes chemically derived materials for forming nanoribbons or nanowires. This type of growth suffers from many issues, e.g., it is difficult to control the density of the nanowires, and there is no alignment among the nanowires. In addition, the growth results in poor uniformity of material properties (dimensions (e.g., width)). The orientation of the nanowires is also very difficult to control.
USPTO Backgrounds
USPTO Backgrounds