1. Field of the Invention
The present invention relates to a technique for managing the memory of a computer. More particularly, the present invention relates to a technique that improves efficiency in usage of the physical memory of a computer.
2. Description of Related Art
It is almost always necessary to use physical memory as the main memory of a computer. On the other hand, since the size of the physical memory is limited, efficiency in usage of the physical memory has been improved by employing a technique for paging out as virtual memory.
Recently, cloud computing is increasingly used. Cloud computing uses a mechanism employing multiple guest environments that operate on a single machine by means of virtualization. Accordingly, there is a greater need for improving efficiency in usage of the physical memory.
To manage the physical memory effectively, it is necessary to grasp the system information about what type of data is present at each of the memory addresses.
For example, a memory analysis tool for a Java® VM, Marusa, developed by the inventors of the present application, detects the type of data in each of the addresses in a Java® virtual machine (JVM) by combining information about the memory usage in each of JVM data structures with the process memory management information from an operating system (OS). However, Marusa provides no information about how each piece of data is accessed.
Japanese Unexamined Patent Application Publication No. 6-89222 discloses a technique that allows optimal selection of a page that is to be swapped out from the physical memory of a computer system, where the physical memory has a page management mechanism and an elapsed-time management mechanism. In this technique, the elapsed-time management mechanism evaluates an accessed/not-accessed flag that represents the access state of each of pages in each of elapsed-time management cycles, generates a multi-bit vector for recording an access history of the page, and stores the multi-bit vector in a repository. However, this technique is not used to determine the types of access made to pieces of data in a page.
Japanese Unexamined Patent Application Publication No. 2006-18705 discloses a technique in which memory access is traced over a wide memory area or a memory area that is assigned to an application. This technique includes: a memory area that is to be assigned to a program is acquired; the acquired memory area is used as a target memory area to be checked; an MMU prohibits the acquired memory area from being accessed; a trace data area which corresponds to the target memory area to be checked is allocated; the MMU generates an access exception when the target memory area to be checked is accessed; and a trace processor records obtained trace information in the trace data area corresponding to the target memory area in which the access exception has occurred. Since an area in which data to be checked is present is continuously prohibited from being accessed in order to detect an access exception, the technique's processing load is rather heavy.
Japanese Unexamined Patent Application Publication No. 2010-15223 discloses a technique that prevents an access speed from being decreased even when a garbage collection process is performed, because of an object that has not been accessed for a long time period. To isolate an object that has not been accessed for a predetermined long time period and that is present in a virtual memory space, the following steps are executed when garbage collection is performed on a computer: a first step of detecting an object that has not been accessed for the predetermined long period, as a no-access object; a second step of moving the no-access object to a newly allocated virtual memory area when a predetermined time period has elapsed after the no-access object was detected; and a third step of, when another predetermined time period has elapsed after the no-access object was moved to the newly allocated virtual memory area, preventing the garbage collection from being allowed to access the newly allocated virtual memory area, which is regarded as an inaccessible area. In this technique, however, only data's accessed status is detected.
A tool called “Memalyze” discloses a paging mechanism that captures all memory accesses to a specified area without failure. However, similar to the technique described in Japanese Unexamined Patent Application Publication No. 2006-18705, the processing load of “Memalyze” is extremely heavy.
USPTO Backgrounds
USPTO Backgrounds