In an electronic device such as a semiconductor element, semiconductor parts such as transistors, resistors and the like are generally arranged on a substrate. Those parts must be electrically insulated from each other, and hence it is necessary to provide an isolation structure among them so as to separate them.
Meanwhile, in the field of electronic devices, the density and integration degree have been increased in recent years. According to the increase of the density and integration degree, it has been required to form isolation structures minute enough to meet the needed integration degree. New isolation structures satisfying that requirement include a trench isolation structure, which is formed by carving fine trenches on the surface of a semiconductor substrate and then filling the trenches with insulating material so as to electrically separate a part positioned on one side from another part on the other side of each trench. The structure thus separating the parts can reduce the isolation area, as compared with the conventional structures, and is accordingly effective in achieving the high integration degree required in these days. In addition, if the parts are layered three-dimensionally to increase the density, it is also necessary to provide an insulating layer between layers of electro-conductive material. As the insulating layer, a pre-metal dielectric (PMD) or inter-metal dielectric (IMD) film is usable.
For forming the above isolation structures, some processes are developed. For example, there is a process in which a substrate surface having a trench structure is coated with a composition containing oxide precursor to fill the trenches in, and then fired to form an oxide film (Patent document 1). There is also a process in which the trenches on the substrate surface are filled with the composition containing oxide precursor and thereafter an insulating film is further inlaid therein by means of high density plasma CVD (Patent document 2). Further, still also a process is disclosed that comprises the steps of: coating a substrate surface with porous silica precursor to form a porous silica film, and then forming an oxide film thereon by CVD to form an interlayer insulating film (Patent document 3).
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USPTO Backgrounds