1. Field
Embodiments of the inventive concept relate generally to a semiconductor device, and more particularly, to a three-dimensional semiconductor memory device including three-dimensionally arranged memory cells and methods of fabricating the same.
2. Description of the Related Art
A three-dimensional integrated circuit (3D-IC) memory technique may be used to increase a memory capacity. The 3D-IC memory technique generally refers to technology related to arranging memory cells three-dimensionally.
One 3D-IC technique is a punch-and-plug technique. The punch-and-plug technique includes sequentially forming multi-layered thin layers on a substrate and then forming plugs to penetrate the thin layers. Through this technique, without a drastic increase of manufacturing costs, a three-dimensional memory device may obtain an increased memory capacity.
USPTO Backgrounds
USPTO Backgrounds