1. Field of the Invention
The present invention relates to a system for performing a co-simulation and/or emulation of hardware and software.
2. Description of the Related Art
In a co-simulation of hardware and software a hardware simulator or a hardware emulator is provided in order to simulate or emulate, respectively, a hardware model. Further, a software simulator is provided to simulate a model of software or to perform directly said software.
In the verification environment a software simulation environment needs to communicate with a hardware simulator or emulator, e.g. a VHDL (very high-speed integrated circuit hardware description language) simulator or accelerator. An inter-process communication between the two simulation environments is required.
The software simulator sends asynchronous requests to the VHDL simulator or accelerator. Said requests need to be serviced by the hardware verification environment. However, the software simulator is several orders of magnitudes faster than the VHDL accelerator. Thus, it is important that the hardware simulator or accelerator runs as fast as possible.
The current implementations of this service rely on a polling mechanism. Said polling mechanism stops the VHDL simulator or accelerator, checks for the existence of new commands and restarts the VHDL simulator or accelerator at regular intervals again. The polling mechanism interrupts the simulation even when no requests for a test case are available. Further, there is an intensive interaction between the software and the hardware simulator. The request for the test case cannot be serviced immediately, since the new request is outstanding until the end of a current poll window.
In one known method the hardware-software interaction between the hardware simulator or accelerator on the one hand and the runtime environment on the other hand is reduced by moving the major parts of a driver code into the model by supplying a VHDL provided for simulation only. Said VHDL allows driving the complete transaction sequences with minimum software overhead.
In another known method the hardware-software interaction is minimized by making use of hardware breakpoints. Said hardware breakpoints can be set up to react with specific hardware triggers and signal their occurrence to the runtime environment.
An example of such a co-simulation environment is known from the article “Accelerating system integration by enhancing hardware, firmware, and co-simulation” by K.-D. Schubert, E. C. McCain, H. Pape, K. Rebmann, P. M. West and R. Winkelmann (IBM J. Res. & Dev., Vol. 48, No. 3/4, May/July 2004).
Another known example of a co-verification for hardware and software is described in the article “Accelerated hardware/software co-verification” (Cadence Design Systems, Inc., 5692C Dec. 5, 2005).
USPTO Backgrounds
USPTO Backgrounds