1. Field of the Invention
The present invention relates to a substrate processing apparatus that carries out processing on substrates as objects to be processed, a control method for the apparatus, and a program for implementing the method, and in particular relates to a substrate processing apparatus that carries out processing on dummy wafers, a control method for the apparatus, and a program for implementing the method.
2. Description of the Related Art
Conventionally, in the manufacture of substrates (objects to be processed) for flat panel displays, semiconductor wafers and so on, substrate processing apparatuses comprised of at least one load lock chamber, at least one transfer chamber, and at least one processing chamber have been used to carry out various types of processing such as film formation, oxidation, diffusion, etching, and annealing. As such substrate processing apparatuses, at least the two types described below are known.
One type is a multi-chamber type substrate processing apparatus. Such a substrate processing apparatus is comprised of three to six processing chambers, a vacuum preparation chamber (load lock chamber) having therein a transfer mechanism for transferring semiconductor wafers into and out of a transfer chamber, described below, the transfer chamber which is polygonal in shape around which are disposed the processing chambers and the load lock chamber and which has a plurality of connecting ports formed in peripheral walls thereof for communicating in gas-tight fashion with the processing chambers and the load lock chamber via gate valves, and a transfer arm that is provided inside the transfer chamber and is able to turn, elongate and contract (see Japanese Laid-open Patent Publication (Kokai) No. H08-46013).
Moreover, the other type is a substrate processing apparatus having chambers in a straight line. Such a substrate processing apparatus has a vacuum processing chamber in which etching is carried out on semiconductor wafers, and a load lock chamber having built therein a scalar type single pick type or scalar type twin pick type transfer arm as transfer means for carrying out handover of the semiconductor wafers between the load lock chamber and the vacuum processing chamber (see Japanese Laid-open Patent Publication (Kokai) No. 2001-53131 and Japanese Laid-open Patent Publication (Kokai) No. 2000-150618).
Each of the types of substrate processing apparatus described above has an object-to-be-processed transferring in/out stage that is connected to the load lock chamber and has a transfer mechanism for transferring semiconductor wafers in and out, and ports on each of which is installed a FOUP (front opening unified pod), described below, as a cassette housing a plurality of unprocessed semiconductor wafers. The object-to-be-processed transferring in/out stage is for transferring the semiconductor wafers in and out between the load lock chamber and the FOUPs.
Moreover, in each of the types of substrate processing apparatus described above, inspection of the processing chamber(s), the load lock chamber and so on must be carried out periodically to check on the state of processing in the processing chamber(s), the state of operation of the transfer mechanism in the load lock chamber and so on. In each such inspection, a non-product wafer called a “dummy wafer” is used, the dummy wafer being actually subjected to processing in the processing chamber, and transferred by the transfer arm. As with the semiconductor wafers described above, a plurality of such dummy wafers are also housed in a FOUP, this FOUP being installed on a special port for exclusive use of this FOUP possessed by the object-to-be-processed (substrate) transferring in/out stage.
FIG. 6 is a view schematically showing the construction of a FOUP housing semiconductor wafers or dummy wafers.
In FIG. 6, the FOUP 500 is a transfer cassette standardized according to J300 (Japan Electronics and Information Technology Industries Association) and I300I (International 300 mm Initiative), and is comprised of a main body 501 which is a container that has a U-shape when viewed from above, has a shape thrust out from an upper surface thereof, and is open at a side thereof opposite a curved side thereof, and a lid 502 that is provided over the opening in the side of the main body 501 and enables this opening to be opened and closed freely. The main body 501 has a plurality of slots (not shown) therein, each slot being able to hold a peripheral edge portion of a 300 mm-diameter semiconductor wafer or a dummy wafer such that the semiconductor wafer or the dummy wafer can be housed in the main body 501 parallel to the upper surface of the main body 501. By inserting a semiconductor wafer or a dummy wafer 503 into each slot, a plurality of semiconductor wafers or dummy wafers 503 can be housed parallel to one another. The lid 502 has sealing rubber made of NBR or the like on a peripheral edge portion thereof that contacts the main body 501, whereby the inside of the main body 501 can be tightly sealed. Moreover, either of the main body 501 and the lid 502 may be made of a resin such as ABS.
Moreover, in addition to such FOUPs 500, pods housing 200 mm-diameter semiconductor wafers are also known as containers for housing semiconductor wafers.
In general, the specification of a dummy wafer varies according to the type of inspection to be carried out, and hence the FOUP 500 houses dummy wafers of a plurality of different types. A housing state relating to the arrangement of the dummy wafers in the FOUP 500 is stored as setup information in an HDD or the like in a control unit (not shown) possessed by the substrate processing apparatus, and in each of periodic inspections during mass production of semiconductor wafers, the control unit selects a dummy wafer suitable for the inspection while referring to the stored setup information, and transfers this dummy wafer out from the FOUP 500. Once even one of the dummy wafers housed in the FOUP 500 reaches its lifetime (usage limit), the FOUP 500 is removed from the object-to-be-processed transferring in/out stage, and a user replaces the dummy wafer that has reached its lifetime.
During this dummy wafer replacement, it is not necessarily the case that the dummy wafer inserted into a particular slot is for the same type of inspection as the dummy wafer that was in that slot before the replacement, and in particular this is hardly ever the case in a semiconductor wafer trial manufacturing plant or the like. Consequently, if the substrate processing apparatus continues to use the setup information for the dummy wafers in the FOUP 500 as it is, then confusion may arise. Therefore, with conventional substrate processing apparatuses, it has been the case for example that, upon carrying out dummy wafer replacement, the setup information for the dummy wafers in the FOUP 500 is deleted from the HDD or the like, and then, while checking the actual housing state of dummy wafers in the FOUP 500 after the dummy wafer replacement, a user inputs/sets setup information corresponding to this housing state to the substrate processing apparatus.
However, the lifetime of a dummy wafer is approximately 1 to 2 weeks during mass production of semiconductor wafers, and in particular is only approximately 2 to 3 days in the case of inspection of processing in a corrosive system. Under such a situation, there is a problem that if the setup information for the dummy wafers in the FOUP 500 is deleted from the HDDD or the like of the substrate processing apparatus, then the user must newly input/set setup information to the substrate processing apparatus every time dummy wafer replacement is carried out and hence there is a considerable burden on the user.
Furthermore, in mass production of semiconductor wafers, during dummy wafer replacement, it is mostly the case that the dummy wafer inserted into a particular slot is for the same type of inspection as the dummy wafer that was in that slot before the replacement, and hence there is little fear of the confusion described above arising; if anything, there is a problem that during inputting/setting of setup information by the user, mismatches between the inputted/set setup information and the actual housing state of the dummy wafers in the FOUP 500 may arise due to input mistakes, resulting in it not being possible to carry out inspection of the various devices in the substrate processing apparatus smoothly, and hence there being a drop in reliability.
USPTO Backgrounds
USPTO Backgrounds