With the development of semiconductor devices towards continuously reduced characteristic sizes, technological advances have lead to exponential increase in terms of the cost of the devices. As a result of the increase in terms of the cost, people are paying more and more attentions to nanoimprint lithography for pattern transfer with low cost. By avoiding the use of expensive light sources and projection optical systems, the nanoimprint lithography makes the cost significantly reduced as compared with the traditional lithography.
The nanoimprint lithography was first studied by professor Stephen Y. Chou at the Nano Structure Laboratory of Princeton University, who imprinted and copied nanometer patterns onto a silicon substrate coated with a polymer material with a mechanical force (high temperature, high pressure) by using a template having the nanometer patterns. The processing resolution of this technology is only related to sizes of the template patterns, and is not physically limited by the shortest exposure wavelength of optical lithography. At present, this technology has been used to produce a pattern with a line width below 5 nm. Due to the elimination of the use of optical lithographic mask plates and optical imaging devices, the nanoimprint lithography has economic advantages of low lost and high throughout.
However, at present, the uniformity of nanoimprinting has become a key issue in whether this technology can be extended in a large scale. Due to the miniaturization of the pattern scale, when the pitch (line width) is in the range of a nanometer scale, it is very important to monitor and detect the uniformity.
USPTO Backgrounds
USPTO Backgrounds