1. Field of the Invention
This invention relates to charge transfer devices (CTD) and, more particularly, to a technique termed extended correlated double sampling for correction of errors in the output signals from a CTD.
2. State of the Prior Art
In the prior art, digital signal processing (DSP) has been utilized in many applications in view of the low cost of the integrated circuits that are available to perform many functions in digital fashion. As compared with analog techniques, DSP has been preferred in that its use of digital implementation has been considered to be preferable in view of cost, weight, flexibility and accuracy considerations. By contrast, the only present advantage of analog techniques is its lower power consumption, which advantage may gradually disappear as technology advances. A further technique known as discrete analog signal processing (DASP) provides an alternative to the aforementioned methods of signal processing and is implemented by sampling at regular intervals an analog signal to provide a series of analog signals or samples, each of which may be operated upon one-at-a-time and have an amplitude containing information on data corresponding to M digital bits, where one bit of resolution in DSP is equivalent to 6dB dynamic range in the analog signal. Experiments have shown that a signal-charge analog packet can be shifted through a typical CTD nearly unattenuated, limited by the size of the holding wells and the minimum detectable output signal.
As more fully described in an article entitled "Charge Coupled Semiconductor Devices": appearing in Bell System Technical Journal, April 1970 by W.S. Boyle and G. E. Smith, CCD's sample an analog input signal to provide a series of discrete analog charge packets to be stored in potential wells created at the surface of a semiconductor and transported along the surface by timing signals. More particularly, these charges constitute minority carriers stored at the silicon-silicon dioxide interface of capacitors and are transferred from capacitor or well to capacitor or well on the same substrate by manipulating the voltages applied across the capacitor.
It has been known heretofore in the prior art to utilize a zero reference in conjunction with an analog signal to provide more accurate interpretation of the analog signal levels. Voltage drift and bias errors, of course, exist in any type of analog circuit. For example, in telemetry, a so-called "return-to-zero" technique has long been known in which alternate signal and reference samples are transmitted, such as from a satellite to a ground station. This technique permits correction of voltage drift and bias errors at the receiver by subtracting the received zero reference from the received signal sample.
U.S. Pat. No. 3,781,574 -- White et al., assigned to the common assignee, discloses a coherent sampled read-out circuit and signal processor. In one embodiment disclosed in the patent, this circuit and processor are coupled to a CCD shift register. In fact, the circuit and processor of the patent have applicability to any type of device from which an analog charge signal readout is to be obtained, for purposes of minimizing the degradation of the readout signal and minimizing any noise contribution due to the readout operation. The term coherent sampling as employed in that patent corresponds to a term employed herein of "correlated double sampling" (CDS). The technique of the 3,781,574 U.S. Pat. No. relates principally to output operations and hence may be applied to any system producing an analog charge output such diode arrays, and CTD, including CCD, systems.
USPTO Backgrounds
USPTO Backgrounds