The semiconductor industry has experienced rapid growth due to improvements in the integration density of a variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from shrinking the semiconductor process node (e.g., shrink the process node towards the sub-20 nm node). As the demand for miniaturization, higher speed and greater bandwidth, as well as lower power consumption and latency has grown recently, there has grown a need for smaller and more creative packaging techniques of semiconductor dies.
Modern electronic devices such as a notebook computer comprise a variety of memories to store information. Memory circuits include two major categories. One is volatile memories; the other is non-volatile memories. Volatile memories include random access memory (RAM), which can be further divided into two sub-categories, static random access memory (SRAM) and dynamic random access memory (DRAM). Both SRAM and DRAM are volatile because they will lose the information they store when they are not powered. On the other hand, non-volatile memories can keep data stored on them permanently unless an electrical charge is applied to non-volatile memories. Non-volatile memories include a variety of sub-categories, such as electrically erasable programmable read-only memory (EEPROM) and flash memory.
A DRAM circuit may comprise a plurality of DRAM memory cells arranged in rows and columns. A DRAM cell is made up of a single metal oxide semiconductor (MOS) transistor and a storage capacitor connected in series. The MOS transistor functions as a switch coupled between a bit line and an electrode of the storage capacitor. The other electrode of the storage capacitor is connected to the corresponding electrodes of the other cells on the same column and is biased to a plate voltage. The storage capacitor contains one bit of information. By enabling a word line coupled to the gate of the MOS transistor, data stored in the storage capacitor can be written in or read out. In particular, during a write operation, the data to be written is placed on the bit line. By turning on the MOS transistor, the storage capacitor will be either charged or discharged depending on the data bit and the original logic state of the storage capacitor. On the other hand, during a read operation, the bit line is pre-charged to a voltage. By turning on the MOS transistor, the voltage change on the bit line indicates the logic state of the storage capacitor.
As semiconductor technologies evolve, embedded DRAM (EDRAM) based semiconductor devices have emerged as an effective solution to further reduce the physical size of a semiconductor chip and improve the performance of memory circuits and logic circuits as a whole. EDRAM is fabricated on the same die as its accompanying CPU processors. Integrating EDRAM with logic circuits on one single die helps to achieve faster read and write speeds, lower power and smaller form factors.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the various embodiments and are not necessarily drawn to scale.
USPTO Backgrounds
USPTO Backgrounds