1. Field of the Invention
The present invention relates to a latching type power semiconductor having an anode, a cathode, and a gate, which is capable of self-arc-extinguishing, in other words, relates to a gate driver device for a GTO thyristor (Gate Turn-Off thyristor) . More specifically, the present invention relates to a gate driver device for a GTO thyristor with a newly improved version of the commutation function of a so-called GCT thyristor (Gate Commutated Turn-off thyristor).
The gate driver device according to the present invention is particularly suitable for controlling GCT thyristors used for large-capacity inverters, but it is also suitable for controlling GCT thyristors used in the high-voltage or large-current parallel connected form in various power conversion devices such as SVCs (Static Var Compensators), VSCs (Voltage Source Converters), etc., of pulse-controlling-type power source equipment and electrical power systems.
2. Description of the Prior Art
When turning off a GTO thyristor, conventional GTO thyristor gate drivers generally cut the current off when the ratio I.sub.A /I.sub.GQ, the ratio of the principal anode current I.sub.A to the turn-off gate current I.sub.GQ, expressed as turn-off gain G.sub.O, is between "3" and "5". In such cases, with conventional GTO thyristors, there are significant variations in turn-off peak voltages due to variations in elements because of the long storage time ts at turn-off. This makes it difficult to operate many series/parallel-connected thyristors simultaneously. Thus, in developing a new type of GTO thyristor, elements free of such variations had to be carefully selected. Also, in conventional GTO thyristors, in order to ensure a reliable turn-off operation, a snubber circuit (normally consisting of a resistor R, a capacitor C, and a diode D) equipped with a snubber capacitor C is required to control the dv/dt at the time of turn-off. And the snubber loss at the time of discharge of such snubber capacitors is too large to be ignored.
To address such problems of the conventional-type GTO thyristors, a method was conceived of turning off the thyristor power semiconductor element with the turn-off gain G.sub.O (=I.sub.A /I.sub.GQ) at 1 by making the gate current rise rate dig/dt (ig: momentary gate current) extremely large and commutating all the main current I.sub.A to the gate circuit. Methods of this type are described in the specifications of U.S. Pat. Nos. 5,237,225, 5,345,096, and 5,493,247. In order to realize a turn-off at such a gain G.sub.O =1, a large-capacity power semiconductor element with various improvements, such as a lowering of the element gate inductance through certain changes to the construction of the area around the gate electrodes of conventional GTO thyristors, appeared on the scene under the name "GCT Thyristor" (e.g., see pages 372-373 of the May 1997 edition of Transistor Technology).
FIGS. 1 and 2 show the circuitry and construction, respectively, of the gate drivers for a GTO thyristor in the prior art. FIG. 1(a) shows a conventional turn-off gate circuit with the inductance of the various circuit parts of the conventional-type GTO thyristor TH expressed equivalently. FIG. 1(b) shows a conventional turn-off gate circuit with the inductance of the various circuit parts of the above-mentioned improved-type GTO thyristor, that is, the GCT thyristor GT. FIG. 1(c) schematizes the conventional gate drive circuit (driver) GD of the GCT thyristor GT. FIG. 2 shows the top- and side-views of the mounted construction of a conventional gate driver device of the GCT thyristor GT. In the drawing, G and K respectively denote the gate and cathode electrodes of the thyristor GT; SP is the gate driver supporting plate (with the same potential as the cathode electrode K); LS is a multi-layer substrate provided on its upper face with a conductor connected to the gate electrode G and, on its lower face, with a conductor connected to the cathode electrode K; MS and FS are a screw and a screw attaching ring; IB is an insulation bushing; WS is a washer; and SR is a metal space ring.
As shown in FIG. 2, in order to realize commutation at turn-off gain G.sub.O =1, the GCT thyristor GT improves the gate connection construction by providing a ring-shaped gate electrode G around the outer part of the thyristor package GT. This arrangement is sometimes referred to as a "Coaxial GTO". As a result of employing such a gate electrode G, the inductance inside the power element can be generally reduced to about one tenth [FIG. 1(b) "2 nH (nano-henry)"] of the conventional-type GTO thyristor TH [FIG. 1(a) "30 nH"]. In addition, by improving the gate lead through means such as the use of a laminated printed circuit board to connect the gate drive GD and the power element GT, the total inductance of the gate circuit can be reduced substantially-for example, to about one hundredth of the total inductance of a conventional GTO thyristor TH using a coaxial cable [FIG. 1(a)]--resulting in an extremely large gate current rise rate dig/dt [refer to FIG. 1(b)].
This type of GCT thyristor greatly lowers the storage time ts--for example, to about one tenth the ts of a conventional GTO thyristor. In addition, when using GCT thyristors, there is no need for a snubber circuit for the control of dv/dt, as required when using conventional GTO thyristors, and thus a snubberless turn-off is possible. Cut-off can therefore be achieved using only a clamping circuit, in the same manner as for a large-capacity IGBT (Integrated Gate Bipolar Transistor). By eliminating snubber loss in this manner, a large reduction in total loss can then be realized. Finally, the GCT thyristor makes it possible to lower the gate storage electric charge to about one half that of a conventional GTO thyristor, thereby allowing for a reduction in gate-driver power consumption.
With respect to the mounted construction of the conventional gate driver (FIG. 2), this includes, on top of a laminated printed circuit board LS connected to the gate and cathode electrodes G and K of the GTO or GCT power semiconductor element GT, such circuit features as switching elements Qon and Qoff for turning on and off the supply of the turn-on current and the turn-off current to the gate, and capacitors Con and Coff for storing electric charges for supplying the turn-on and turn-off currents. For example, many MOSFET (Metal Oxide Semiconductor Field Effect Transistors) are used in the switching elements Qon and Qoff, and many chemical capacitors, such as electrolytic aluminum capacitors, are used as the capacitors Con and Coff. In this case, a lowering of the inductance of the gate circuit is sought and a large gate current rise rate dig/dt is obtained by, among other methods, lining-up these many elements in series.
However, the chemical capacitors Con and Coff used here for the supply of the turn-on and turn-off currents are characterized by the problems of large inductance and large equivalent direct current resistance (ESR), with the result that the capacity of capacitors must be increased to more than necessary. In other words, in order to achieve the desired turn-on/off functions, many large-capacity capacitors must be lined up in parallel until the required equivalent series resistance and inductance are obtained. However, when chemical capacitors with large equivalent series resistance and inductance are used, the capacity of the capacitors will exceed the electric load required for turn-on/off. This results in the drawback of an increase in the size of both the gate driver GD and the wiring inductance, and thus the gate-circuit inductance cannot be lowered appreciably.
In addition, the inductance of the laminated printed circuit board increases in proportion to the thickness of the intermediate insulation layer, whereas, in conventional GTO and GCT thyristors, etc., a thick laminated printed circuit board LS (FIG. 2) is used to connect the power elements GT to the gate circuit and to mount MOSFET, chemical capacitors, and other circuit elements. This is an extremely inconvenient arrangement in terms of reducing the inductance. Also, with respect to the cut-off performance of these GTO and GCT power semiconductor elements, since the gate current rise rate dig/dt, when snubberless, increases in proportion to the "total inductance Lg of gate voltage Vg/gate circuit," the following drawback arises: although lowering the inductance is a precondition for obtaining the desired performance, the gate current rise rate dig/dt cannot be increased very appreciably because the inductance cannot be lowered under these circumstances, and thus, under the condition of a snubberless, the turn-off current cannot be increased.
Also, when turning on GCT and other improved-type GTO thyristors, increasing the gate current rise rate dig/dt not only has the effect of reducing the switching loss, but is also a necessary technique for obtaining the sudden start-up currents of pulse power source devices, etc. From this point of view, since the conventional turn-on gate circuit has resistors for limiting current and preventing resonance inserted in a series between the switching elements and capacitors connected in the series to the gate and cathode of the power semiconductor element, a large gate current rise rate dig/dt cannot be expected. Therefore, this conventional circuit has drawbacks such as the impossibility of hard-on or the occurrence of large turn-on loss.
In the conventional turn-on circuit of the power semiconductor element of GTO and GCT thyristors, etc., in order to have a large current flow into gate electrode G at the instant the power semiconductor element GT is turned on, as shown by turn-on current G Don in FIG. 1(c), after rectifying the output of the transformer Tr with diodes Da and Db, a turn-on electric load is charged in advance in a main capacitor Con of suitable capacity via smoothing inductance Lf and current-limiting series resistance Rs. Then, by inputting turn-on signal ON, the switching power MOSFET element Qon is made to come on for an appropriate period, and the electric load that was charged in the main capacitor C is diverted into the gate electrode G of the power element GT via the series resistance Rs.
In this case, not only do the sizes of the inductance Lf and resistance Rs greatly limit their mounting in the gate driver device, but at the same time, because the series inductance actually exists in resistance Rs, it is not possible to quickly start up the turn-on gate current or reduce the switching loss when turning on the power semiconductor element GT. This results in a loss in the resistance Rs itself, among other drawbacks.
Also, due to the existence of the smoothing inductance Lf in the power source circuit, a series circuit Lf-Rs-Con is created so that, in the case of Rs&lt;2 (Lf/Con).sup.1/2, resonance occurs between the inductance Lf and gate current supply capacitor Con. This results in the terminal voltage of the capacitor Con overshooting the output voltage of the transformer Tr after element Qon goes off, thus extending the charging time of the capacitor Con and leading to such demerits as an inability to raise the switching frequency, etc.
USPTO Backgrounds
USPTO Backgrounds