1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method for forming a device-isolating layer of a semiconductor device.
2. Background of the Related Art
The process for forming device-isolating regions to isolate one cell from another is an important technology for device miniaturization. Much research and continuing development has been directed to forming device-isolating regions.
For a large capacity semiconductor memory the width of device-isolating region is a primary factor to determine on its total size. Local oxidation of silicon is a method for forming a device-isolating region. In this method, however, a bird's beak is generated so that the device reliability becomes poor. As methods improved from local oxidation of silicon, side wall masked isolation (SWAMI) and selective polysilicon oxidation (SEPOX) are suggested.
A related art method of shallow trench isolation (STI), in which grooves are formed in a substrate and an insulator is buried in the grooves is another suggested method. In the STI method, a trench is formed in a substrate, and an insulator is buried in the trench to form a device-isolating layer. Initially, a plasma oxide film or an undoped silicate glass (USG) film formed by an atmospheric pressure chemical vapor deposition (APVCD) is used to be buried in a tench as the isolating-layer. Another suggested related art method uses a high density plasma chemical deposition (HDPCVD) oxide film to bury a trench as the size of devices is decreased.
Related art methods for forming a device-isolating layer will be described with reference to FIGS. 1A to 2B. FIGS. 1A to 1B are cross-sectional views showing process steps of a related art method for forming a device-isolating layer in a semiconductor device.
As shown in FIGS. 1A and 1B, an APCVD oxide layer is used to bury a trench. Referring to FIG. 1A, a nitride layer 3 is formed on a thermal oxide layer 2 on a semiconductor substrate 1 and the nitride layer 3 is selectively etched. With the patterned nitride layer 3 serving as a mask, a thermal oxidation process is performed to form the thermal oxide layer 2. The nitride layer 3 is then selectively etched and the substrate 1 is etched to a predetermined depth to form trenches in the substrate 1 in regions to be used as a device-isolating layer.
A plasma oxide layer 4 is formed on the entire surface including the thermal oxide layer 2 and the trench. A USG layer 5 is formed on the plasma oxide layer 4 with an APCVD process. The trench is filled with the USG layer 5. Referring to FIG. 1B, the USG layer 5 and the plasma oxide layer 4 are etched-back to remain only in the trench, thereby forming a device-isolating layer.
In the method using a plasma oxide layer 4 and an USG layer 5, design rule is decreased, and it is difficult to apply this method to mass production. Thus, a second related art method using an oxide layer by an HDPCVD process is preferred and will be described with reference to FIGS. 2A and 2B.
Referring to FIG. 2A, a thermal oxide film 2 is formed on a semiconductor substrate 1, and a nitride layer 3 is formed on the thermal oxide film 2. The nitride layer 3 is selectively etched to be removed over the device-isolating regions. The thermal oxide film 2 and the semiconductor substrate 1 are etched to a predetermined depth to form trenches with the patterned nitride layer 3 serving as a mask. Subsequently, another thermal oxide layer is formed on the surface of the trench and an HDPCVD oxide layer 6 is formed on the entire surface including the trench to fill the trench. Referring to FIG. 2B, the HDPCVD oxide layer 6 is etched-back to remain in the trench, thereby forming device-isolating layers.
Such related art methods for forming device-isolating layers have various problems. If an APCVD oxide film is used to fill a trench, voids are generated at a narrow portion of the width of a device-isolating layer by physical characteristic of an APCVD oxide film, which deteriorates a device isolation characteristic. At a wide portion of the width of an APCVD oxide film device-isolating layer, dishing is so severe that an additional process is needed to compensate for the dishing defect. If an HDPCVD oxide film is used to fill trenches, plasma damage generated by sputter etching causes leakage current, which deteriorates the characteristic of device isolation.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
USPTO Backgrounds
USPTO Backgrounds