1. Field of the Invention
This invention relates to output buffers utilized in integrated circuits and more particularly to controlling slew rates of such output buffers.
2. Description of the Related Art
High speed data busses, such as PCIX 2.0, have requirements regarding variations in slew rate. Slew rate in that context is the rate of change of output signal voltage. For example in PCIX 2.0, the slew rate requirement is 1.8V/ns<Slew Rate<3.0 V/ns. One approach to providing slew rate control is to build a replica circuit of an output buffer that accurately represents the output slew rate. A slew rate control current is then adjusted until the replica slew rate measures to be within limits. Adjusting the replica circuit appropriately requires an external time base and a slew rate measurement technique.
In integrated circuit manufacturing, the manufacturing process varies resulting in integrated circuits having different performance capabilities, even if the same part is manufactured in the same manufacturing facility. Thus, due to process variations and operating ranges, integrated circuits behave differently. As a result integrated circuits may be grouped based on performance into “fast corners” and “slow corners.” In the fast corner, integrated circuits perform faster due to variations of such factors as process, voltage, or temperature. Process variations can include such factors as threshold voltage (VT), gate length, input capacitance, sheet resistance, and gate to drain capacitance. Integrated circuits that operate in the fast corner typically have process characteristics leading to faster performance such as lower VT, shorter gate length, lower input capacitance, etc. Similarly, a high supply voltage VDD can result in increased performance of the integrated circuit. For those integrated circuits in the slow corner, their operation is slower due to such factors as low VDD and high VT. Of particular interest herein is the varying performance of output driver circuits due to process, voltage, and/or temperature (PVT) variations.
Performance variations due to process, voltage, and temperature make it difficult to guarantee that slew rate requirements are met across normal process variations. That is, an output signal will change too quickly or too slowly to meet slew rate requirements.
USPTO Backgrounds
USPTO Backgrounds