1. Field of the Invention
The present invention generally relates to a memory card having a size similar to that of credit card and being capable of storing a great deal of information therein and more particularly memory card having a random access memory and power supply therein.
2. Prior Art
Generally, a 3 Volt lithium battery is used in a memory card having a RAM. A power source for the main body (that portion of a system which can contain the memory card but excludes the memory card) is often 5 Volt to drive a CPU and various control circuitries. Thus the moment the memory card is inserted into the main body, the voltage of the power source for the RAM in the memory card abruptly changes from 3 Volt to 5 Volt to thereby often destroy a part or all of the data stored in the RAM. The prior art measure to prevent this event will be described using FIG. 2 which is a circuit diagram of an embodiment of a prior art memory card. In FIG. 2, memory card 20 is generally constituted by a RAM 21, a 3 Volt battery 22, a resistor 23 and capacitor 24 to prevent the data destruction. A diode 25 is for prevention of reverse flow. When the memory card 20 is inserted the main body, power source lines, address lines 201 (A0-An), data lines 202 (D0-Dn), control lines 203 (chip enable, etc.,) are connected electrically with the circuitries in the main body. At this time the RAM power source voltage slowly rises up from 3 volt to 5 Volt with a time constant of resistor 23 and capacitor 24. If a fluctuation of the RAM power source voltage is slow with a time constant more than 1 msec (1/1000 seconds), it is said that data destruction can be prevented, which is actually ascertained experimentally. Thus the prior art prevents destruction of the data stored in the RAM by inserting a resistor and capacitor in circuit of the power source line for the memory card.
However, a problem with the prior art memory card having the above structure is that the values of a resistor and a capacitor to render the time constant of the RAM power source fluctuation larger than 1 msec are limited to values to be described hereinafter. If the capacity of the capacitor is increased, its volume also increases, so that the memory card which is required to be thin limits the capacity of the capacitor 24 to less than about 1 .mu.F. As a result the value of resistance of resistor 23 is required to be more than about 1K , and the impedance of the power supply line increases. The RAM has a cell structure as shown in FIG. 3. When the RAM is accessed to, a switch 211 opens, and electric current flow through a road transistor 212 and a transistor 213 within the cell in the direction of the arrow 214. A sense amplifier and a decoder also are enable. Total current during the access to the RAM is generally around 30 to 40 mA. As a described above, when the impedance of the power supply line is increased by inserting the resistor of more than 1K to the power supply line, voltage fall occurs at the inserted resistor by the current during access and voltage supplied to the RAM is below the operation voltage thereof. In order to prevent this problem, the value of resistance of the inserted resistor have to be small. Namely, since the value of the resistor and capacitor are limited, it is very difficult to obtain a time constant larger than 1 msec.
Furthermore the capacitor is charged via a protective diode within the RAM from various signal lines depending on the state of the address lines, data line, control lines (chip enable, etc.) on the side of the main body, so that a desired time constant cannot be obtained.
USPTO Backgrounds
USPTO Backgrounds