Semiconductor (SC) devices, especially transistors are often sensitive to leakage currents from conductor and interconnections into the semiconductor bulk or substrate, and/or to surface states that may upset the electrical potential in critical device regions. Both effects can degrade the operation of the device and may occur in the same device. What is done to mitigate one problem may adversely affect the other. Such effects are especially encountered with semiconductors that lack a natural passivating oxide, such as is available in the silicon-silicon dioxide system. A further problem encountered with semiconductors other than silicon is that many of them are substantially transparent to the wavelengths of light used for mask alignment between successive fabrication steps. In these circumstances, the alignment marks or features placed on the semiconductor or other substrate are difficult to resolve, thereby making it more difficult and more expensive to fabricate such devices, especially with fine dimensions used for high speed operation. Accordingly, there is a need for improved device structures and methods of fabrication that can mitigate or eliminate such effects.
Accordingly, it is desirable to provide improved semiconductor devices, especially transistors and arrays of transistors, where substrate leakage and surface state effects and alignment problems are minimized, and which are suitable for use with various type IV, III-V, II-VI materials and organic semiconductor compounds. It is further desirable that the methods, materials and structures employed be compatible with present day manufacturing capabilities and materials and not require substantial modifications of available manufacturing procedures or substantial increase in manufacturing costs. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.
USPTO Backgrounds
USPTO Backgrounds