1. Field of the Invention
The present invention relates generally to data driven type information processors, and more particularly, to data driven type information processors capable of reading out a plurality of instructions from a program memory by each access.
2. Description of the Background Art
In a conventional yon Neumann computer, various information in the form of a program is stored in a program memory in advance, and addresses in the program memory are sequentially specified by a program counter, so that the instructions are sequentially read out, whereby the instructions are executed.
On the other hand, a data driven type information processor is one type of non-von-Neumann computer not employing sequential execution of instructions by a program counter. Such a data driven type information processor employs architecture based on parallel processing of instructions. In the data driven type information processor wherein an execution of an instruction is enabled upon collection of data to be operated, a plurality of instructions are simultaneously driven by data, so that programs are executed in parallel in accordance with a natural flow of the data. As a result, it is considered that a time required for the operation is expected to be drastically reduced.
FIG. 8 is a block diagram showing the structure of a conventional data driven type information processor.
The data driven type information processor shown in FIG. 8 includes a program storing unit 11, a paired data detecting unit 2, an operation processing unit 3, a junction unit 211, a branch unit 22 and an input unit 23.
FIG. 9 is a diagram showing the structure of the junction unit shown in FIG. 8. FIG. 10 is a diagram showing the structure of the program storing unit shown in FIG. 8. FIG. 11 is a diagram showing a part of a conventional data flow program to be processed by the data driven type information processor shown in FIG. 8. FIG. 12 is a diagram showing a field structure of a conventional data packet to be processed by the data driven type information processor shown in FIG. 8.
A data packet 60 shown in FIG. 12 includes a destination field F1, an instruction field F2, a data 1 field F3 and a data 2 field F4. The destination field F1 stores a destination node number ND, the instruction field F2 stores an instruction code OP, and the data 1 field F3 PG,4 or the data 2 field F4 stores operand data OPD.
Junction unit 211 of FIG. 8 has two input ports I1 and I2 and two output ports O1 and O2 as shown in FIG. 9. Data packets output from output ports O1 and O2 are synchronized with each other. Branch unit 22 has two input ports i1 and i2 and two output ports o1 and o2.
Program storing unit 11 of FIG. 8 includes a memory access portion 1d, a memory portion 1e and a packet generation portion 1f as shown in FIG. 10. Memory access portion 1d has an input end connected to output port o1 of branch unit 22, while packet generation portion 1f has an output end connected to input port I1 of junction unit 211. Memory portion 1e stores a data flow program 70 shown in FIG. 11. Memory access portion 1d reads a pair of a destination node number and an instruction code of the data flow program 70 stored in memory portion 1e as shown in FIG. 11 by addressing (see 2 in the figure) based on a destination node number ND of a data packet applied from output port o1 through the path indicated by 1 in the figure and transmits the destination node number and the instruction code to packet generation portion 1f through the path indicated by 3 in the figure. Packet generation portion 1f stores the read destination node number and instruction code in the destination field F1 and the instruction field F2 of a data packet 60, respectively, and outputs the data packet to input port I1 through the path indicated by 4 in the figure. Program storing unit 11 outputs only one instruction for each addressing in this manner.
Paired data detecting unit 2 queus applied data packets 60. More specifically, the unit detects two different data packets 60 having the same destination node number ND, stores operand data OPD, that is, the contents of the data 1 field F3 shown in FIG. 12, for example, of one of the data packets 60, in the data 2 field F4 of the other data packet and outputs said the other data packet 60.
Operation processing unit 3 performs an operation processing for operand data OPD stored in an applied data packet 60 by an instruction code OP stored therein, stores the operation result in the data 1 field F3 of the data packet 60 and outputs the data packet.
FIGS. 13A to 13H and FIGS. 14A to 14E are diagrams showing field structures of data packets flowing through the data driven type information processor shown in FIG. 8 during execution of a program.
Again with reference to FIG. 8, the two input ports of input unit 23 are connected to data transmission paths 31 and 32, respectively. Applied to data transmission path 31 is a data packet 31P comprised of a destination field 31a and an instruction field 31b as shown in FIG. 13A. Applied to data transmission path 32 is a data packet 32P comprised of a data field 32a as shown in FIG. 13B. The two output ports of input unit 23 are connected to input ports I1 and I2 of junction unit 211 through data transmission paths 33 and 34, respectively.
The output port of program storing unit 11 is connected to a data transmission path 36. Data transmission path 36 is supplied with a data packet 36P comprised of a destination field 36a and an instruction field 36b as shown in FIG. 13C.
The output port of operation processing unit 3 is connected to a data transmission path 48 which is connected to input port I2 of junction unit 211. Data transmission path 48 is supplied with a data packet 48P comprised of a data field 48a as shown in FIG. 13D.
Two output ports O1 and O2 of junction unit 211 are connected to two input ports of paired data detecting unit 2 through data transmission paths 37 and 38, respectively. Data transmission path 37 is supplied with a data packet 37P comprised of a destination field 37a and an instruction field 37b as shown in FIG. 13E. Data transmission path 38 is supplied with a data packet 38P comprised of a data field 38a as shown in FIG. 13F.
The two output ports of paired data detecting unit 2 are connected to two input ports i1 and i2 of branch unit 22 through data transmission paths 41 and 42, respectively. Data transmission path 41 is supplied with a data packet 41P comprised of a destination field 41a and an instruction field 41b as shown in FIG. 13G. Data transmission path 42 is supplied with a data packet 42P comprised of a data 1 field 42a and a data 2 field 42b as shown in FIG. 13H.
One output port o1 of branch unit 22 is connected to the input port of program storing unit 11 through a data transmission path 43 and to the one input port of operation processing unit 3 through a data transmission path 45. Branch unit 22 is connected outside the processor through a data transmission path 44. The other output port o2 of branch unit 22 is connected outside the processor through a data transmission path 46 and to the other input port of operation processing unit 3 through a data transmission path 47. Data transmission path 43 is supplied with a data packet 43P comprised of a destination field 43a as shown in FIG. 14A and data transmission path 45 is supplied with a data packet 45P comprised of an instruction field 45a as shown in FIG. 14B. Data transmission path 47 is supplied with a data packet 47P comprised of a data 1 field 47a and a data 2 field 47b as shown in FIG. 14C. Data transmission path 44 is supplied with a data packet 44P comprised of a destination field 44a and an instruction field 44b as shown in FIG. 14D, while data transmission path 46 is supplied with a data packet 46P comprised of a data field 46a as shown in FIG. 14E.
FIG. 15 is a diagram illustrating operations in the data driven type information processor shown in FIG. 8 in accordance with a flow of various data packets during execution of a program. With reference to FIG. 15, operation of a conventional data driven type information processor will be described.
First, a pair of data packets 31P and 32P are applied to input unit 23. These data packets 31P and 32P are transmitted to input ports I1 and I2 of junction unit 211, respectively. At an initial time point, these data packets 31P and 32P are transmitted without being operated as data packets 37P and 38P, respectively, from output ports O1 and O2 to paired data detecting unit 2. When two different pairs of data packets having the same destination node number are detected by paired data detecting unit 2, a pair of data packets 41P and 42P are output therefrom.
Branch unit 22 selects continuation of an internal processing related to these data packets 41P and 42P or transmission of these data packets 41P and 42P outside the apparatus. If the internal processing is to be continued, branch unit 22 separates a data packet 41P into a data packet 43P comprised of a destination field and a data packet 45P comprised of an instruction field, and transmits data packet 43P to program storing unit 11 and data packet 45P to operation processing unit 3. In addition, branch unit 22 transmits data packet 42P as a data packet 47P to operation processing unit 3. When data packets 41P and 42P are transmitted outside the apparatus, data packet 41P is not separated. Data packet 41P transmitted outside the apparatus is output as a data packet 44P and in the same manner, data packet 42P is output as a data packet 46P.
Operation processing unit 3 performs an operation processing related to one or two operand data OPD stored in data packet 47P based on an operation code OP stored in data packet 45P, and outputs data packet 48P storing only the data indicative of the operation result.
Meanwhile, program storing unit 11 reads a destination node number and an instruction code in a subsequent order of the data flow program 70 shown in FIG. 11 by addressing based on a destination node number ND stored in data packet 43P. Output to data transmission path 36 is data packet 36P including the destination code number and the instruction code read from program storing unit 11. Hereinafter, as respective data packets sequentially circulate through respective processing units in the same manner as described above, a processing in accordance with the data flow program 70 proceeds.
Junction unit 211 arbitrates between externally applied data packets and internally processed data packet. When the internally processed data packet 36P contend with the externally applied data packet 31P, the internally processed data packet 36P is given priority to be output from output port O1. The data packet, to which priority is not given, is kept waiting until no contender appears.
When the internally processed data packet 36P is selected at output port O1, data packet 48P output from operation processing unit 3 is selected at output port O2, and when the externally applied data packet 31P is selected at output port 01, the externally applied data packet 32P is selected at output port O2. Data packet 38P is output in synchronization with data packet 37P. Unselected data packets are kept waiting.
In data packet 42P output from paired data detecting unit 2, when a corresponding instruction code OP indicates one operand instruction, operand data OPD is stored only in the data 1 field 42a, while operand data OPD are stored in the data 1 field 42a and the data 2 field 42b when the corresponding instruction code OP indicates two operand instructions.
As described in the foregoing, it is possible to combine (merge) a data packet newly output from program storing unit 11 with a corresponding data packet processed by operation processing unit 3 without applying special identification information to a data packet separated by branch unit 22.
In recent years, for realizing a particularly desired improvement in a processing rate of a data driven type information processor, an operation processing rate of operation processing unit 3 should be first increased. Since operation processing unit 3 carries out one operation processing in response to an input of one instruction as described above, the unit has to wait (waiting time) for a subsequent input of one instruction after the completion of the operation processing. In order to increase an operation processing rate of operation processing unit 3, therefore, the waiting time should be eliminated by applying a large amount of instructions per unit time to operation processing unit 3, thereby increasing the amount of operation processings per unit time by operation processing unit 3. In other words, since program storing unit 11 is a supplier of instructions to operation processing unit 3, an instruction supplying capacity of program storing unit 11, that is, the amount of instructions to be read from memory portion 1e per unit time should be increased. Since program storing unit 11 reads out only one instruction per access as described above, read of a large amount of instructions per unit time inevitably requires speed-up of the operation of program storing unit 11. However, an information processor using a high-speed accessible memory as program storing unit 11 is expensive itself or a system including such processor is too expensive to be practical. With a high-speed memory, a processing rate of a processor cannot be greater than an access rate of a program storing unit.
USPTO Backgrounds
USPTO Backgrounds