1. Field of the Invention
The present invention generally relates to a semiconductor device, in particular, to a one time programmable read only memory (OTPROM) and a programming method thereof.
2. Description of Related Art
A non-volatile memory device has been widely adopted in personal computers and electronic devices due to the advantages of retaining the stored data even after a power applied on the non-volatile memory device is turned off. Generally, non-volatile memories are classified into an erasable programmable read only memory (EPROM), an electrically erasable programmable read only memory (EEPROM), a mask read only memory (Mask ROM), a one time programmable read only memory (OTPROM), and the like.
The EPROM and EEPROM are both better choices in practice, due to their recordable and erasable capabilities. However, the manufacturing processes of the EPROM and the EEPROM are relatively complex and they have a higher manufacturing cost.
As for the Mask ROM, although the manufacturing process thereof is relatively simple and has a low cost, a mask is required to define the data to be written. Thus, there are many limitations in use.
As for the OTPROM, since data is written therein after the memory left the factory, that is, data can be written therein by a user according to the configuration environment of the memory, the OTPROM is more convenient than the Mask ROM in use. In recent years, the OTPROM has become an indispensable element in semiconductor integrated circuit (IC) devices. The OTPROM can be widely used in, for example, redundancy application of a high-density memory such as a dynamic random access memory (DRAM) or a static random access memory (SRAM), tuning of an analog circuit, storage of a code such as an encryption key, and chip ID for storing management information such as a log in a manufacturing process.
U.S. Pat. No. 5,847,441 and U.S. Pat. No. 5,973,380 disclose semiconductor junction antifuse circuits and devices. In U.S. Pat. No. 5,847,441 and U.S. Pat. No. 5,973,380, one junction antifuse is blown by applying a breakdown voltage and current flows across the reverse-biased junction to cause dopant migration forms a conductive path. U.S. Pat. No. 5,852,323 discloses an electrically programmable antifuse using metal penetration of a P-N junction. In U.S. Pat. No. 5,852,323, one necked-down junction antifuse is programmed by reverse-bias voltage and current heats the necked-down region to create a hot filament between metal contacts. U.S. Pat. No. 3,641,516 discloses a write once read only store semiconductor memory. In U.S. Pat. No. 3,641,516, the write once read only store semiconductor memory including back-to-back diode is programmed by fusing current to cause a metal-semiconductor alloy to form and short out the reverse diode.
As the semiconductor technology steps into a deep sub-micron manufacturing process, the size of the device is gradually reduced, and correspondingly, as for a memory device, the size of memory cells becomes increasingly small. On the other hand, as the information electronic products (such as computers, mobile phones, digital cameras, and personal digital assistants (PDAs)) have to handle and store increasingly more data, the memory required to be configured in these information electronic products has to have an increasingly large capacity. In the case of requiring a reduced size and an increased capacity of a memory, it has become a common goal in this field to manufacture memory devices with reduced sizes and high integration levels while maintaining desirable qualities.
USPTO Backgrounds
USPTO Backgrounds