There is a demand for a semiconductor integrated circuit including MOS transistors to operate at a lower voltage because the transistor withstand voltage has been lowering due to process rules becoming finer and so as to meet the demand for reducing the power consumption. However, when operating at lower voltages, the operation speed of a semiconductor integrated circuit typically varies more significantly due to variable factors in the manufacturing process, such as the transistor threshold voltage, the oxide film thickness, the mobility and the process precision, changes in the ambient temperature, etc. Variations in the operation speed decrease the production yield of semiconductor integrated circuits and increase the cost thereof.
A conventional approach to reducing variations in the threshold voltage from the manufacturing process is the technology for controlling the substrate voltage of a transistor as disclosed in Japanese Laid-Open Patent Publication No. 9-129831, for example. This is a technology for controlling the substrate potential of a MOS transistor so as to bring the threshold voltage closer to a predetermined voltage value.
Expression 1 below shows the relationship between the threshold voltage Vt and the substrate potential Vb of a MOS transistor.Vt=Vto+γ(√(α−Vb))  (Expression 1)
In Expression 1, Vto, α and γ are each a constant dependent on how successful the manufacturing process was. Vb is the voltage difference between the source of the MOS transistor and the substrate, and the difference is referred to as the “substrate potential”. It can be seen from Expression 1 that the threshold voltage Vt increases or decreases when the substrate potential Vb is controlled to be a negative voltage or a positive voltage, respectively. Referring to FIG. 14, the relationship between the variation in the threshold voltage Vt and the control voltage of the substrate potential Vb will be described briefly. Consider how to control the threshold voltage Vt to be always at a predetermined value V1 for a variation range (V1− to V1+) of the threshold voltage Vt. The threshold voltage Vt can be adjusted to the predetermined value V1 by controlling the substrate potential Vb to be 0 V, V−(V) or V+(V) when the threshold voltage Vt is equal to V1 (the predetermined value), V1− (the lower limit of the variation range) or V1+ (the upper limit of the variation range), respectively. This can be done with a circuit configuration in which the predetermined value V1 is produced as a reference voltage, and the substrate potential Vb is adjusted by a feedback control so that the threshold voltage Vt of the MOS transistor is equal to the predetermined value V1.
With this conventional approach using such a configuration, it is possible to suppress variations in the threshold voltage Vt.
Problems to be Solved
However, the operation speed of a semiconductor integrated circuit using MOS transistors is varied not only by the threshold voltage Vt, but also by other variable factors in the manufacturing process (such as the oxide film thickness, the mobility and the process precision), changes in the ambient temperature around the semiconductor integrated circuit, and variations in the operating power supply voltage precision.
Variations in the operation speed of a MOS transistor circuit will now be described briefly.
Expression 2 below represents the operation speed (delay time) of a MOS transistor circuit.τ=C·Vdd/Ids  (Expression 2)
In Expression 2 above, τ is the delay time of a MOS transistor circuit such as a logic gate, C is the load capacitance, Vdd is the operating power supply voltage of the MOS transistor circuit, Ids is the saturation current value of the MOS transistor under the operating power supply voltage. Therefore, in order to keep the operation speed of a MOS transistor circuit constant, it is important to suppress variations in the saturation current value Ids of the MOS transistors.
Typically, the saturation current of a MOS transistor is as shown in Expression 3 below.Ids=(½)μCox(W/L)(Vdd−Vt)2  (Expression 3)
In Expression 3 above, Ids is the saturation current value of a MOS transistor, μ is the mobility, Cox is the gate capacitance per unit area, W is the gate width of the MOS transistor, L is the gate length of the MOS transistor, Vdd is the operating power supply voltage of the MOS transistor circuit, and Vt is the threshold voltage of the MOS transistor.
As can be seen from Expression 3 above, the saturation current Ids of a MOS transistor may vary depending on a number of variable factors, in addition to the threshold voltage Vt, such as the mobility μ (which is dependent on the ion dose precision), the gate capacitance Cox (which is dependent on the gate oxide film thickness precision), and the value W/L (which is dependent on the process precision). Moreover, the saturation current Ids of a MOS transistor may also be varied by changes in the threshold voltage Vt or the mobility μ caused by the ambient temperature during operation of the MOS transistor.
Referring to FIG. 13(a), FIG. 13(b) and FIG. 13(c), how the saturation current Ids of a MOS transistor is varied by the variable factors will now be described.
FIG. 13(a) shows the saturation current Ids of a MOS transistor with respect to the operating power supply voltage Vdd where only the threshold voltage Vt shown in Expression 3 varies. If the threshold voltage Vt is higher than a predetermined medium value of the threshold voltage Vt, the curve shifts in the positive direction in which the operating power supply voltage Vdd increases, thereby lowering the saturation current value Ids of the MOS transistor at an operating power supply voltage Vdd1. If the threshold voltage Vt is lower than the predetermined medium value of the threshold voltage Vt, the curve shifts in the negative direction in which the operating power supply voltage Vdd decreases, thereby increasing the saturation current value Ids of the MOS transistor at the operating power supply voltage Vdd1.
FIG. 13(b) shows the saturation current Ids of a MOS transistor with respect to the operating power supply voltage Vdd where the value μCox (W/L) in shown in Expression 3 varies. If the value μCox(W/L) is larger than a predetermined medium value thereof, the gradient of the parabolic curve increases, thereby increasing the saturation current value Ids of the MOS transistor at the operating power supply voltage Vdd1. If the value μCox(W/L) is smaller than the predetermined medium value thereof, the gradient of the parabolic curve decreases, thereby decreasing the saturation current value Ids of the MOS transistor at the operating power supply voltage Vdd1.
FIG. 13(c) shows the saturation current Ids of a MOS transistor with respect to the operating power supply voltage Vdd where the ambient temperature varies. In Expression 3, the mobility μ and the threshold voltage Vt are temperature-dependent, and they both typically decrease as the temperature increases. Therefore, under a relatively high operating power supply voltage Vdd1, where a decrease in the mobility μ has greater influence, if the temperature increases, the saturation current value Ids of the MOS transistor decreases. However, under a relatively low operating power supply voltage Vdd2, where a decrease in the threshold voltage Vt has greater influence, if the temperature increases, the saturation current value Ids of the MOS transistor increases. Thus, the saturation current value Ids is influenced by a change in the temperature differently depending on the operating power supply voltage value Vdd.
As described above, the saturation current value Ids of a MOS transistor may vary depending on a number of variable factors other than the threshold voltage Vt. Therefore, it can be seen that the conventional approach in which variations in the threshold voltage Vt are suppressed may not sufficiently suppress variations in the operation speed of a MOS transistor circuit.
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