1. Field of the Invention
The present invention relates to a data processing device and a method of controlling the same, and more particularly, to a data processing device including a counter measuring an execution state of a task, and a method of controlling the data processing device.
2. Description of Related Art
In recent years, a multi-task operation in which a plurality of tasks are operated in time division has been executed in data processing devices such as micon. In the multi-task operation, the execution time is allocated for each task, and when the execution time of the task reaches a predetermined time, an interruption request is generated in the task and the process is made back to Operating System (OS) so as to execute other tasks again. In order to realize this technique, the data processing device in which the multi-task operation is executed includes a timer measuring the execution time of each task.
This timer can be configured with software or hardware. In the case of the software, while an operation of switching tasks is executed in software, the timer cannot stop counting or restart counting. In this case, the measurement time may not be accurate. On the other hand, when the timer is implemented in the hardware, the timer can stop counting or restart counting while the tasks are switched. Japanese Unexamined Patent Application Publication No. 10-247146 discloses a technique in which the timer is formed by the hardware so as to measure the task execution time with accuracy.
In the technique disclosed in Japanese Unexamined Patent Application Publication No. 10-247146, a Central Processing Unit (CPU) includes a timer control register. The timer control register provides a bit for designating whether or not a timer is operated by synchronizing with an execution mode and a bit for designating the mode operating the timer by synchronizing with the execution mode. When the timer is operated by synchronizing with the execution mode, the bit designating whether or not the timer is operated by synchronizing with the execution mode is set to 1, and when not, the bit is set to 0. The bit designating the mode operating the timer by synchronizing with the execution mode is set to 1 when the timer is operated in a privilege mode, and is set to 0 when operated in a non-privilege mode. In Japanese Unexamined Patent Application Publication No. 10-247146, it is possible to accurately measure the execution time of the task for each execution mode by controlling the operation of the timer by the CPU referring to these bits. A technique of measuring the execution time of the task by the hardware is also disclosed in Japanese Unexamined Patent Application Publication Nos. 2004-504667, 2000-322277, and 2-271437.
USPTO Backgrounds
USPTO Backgrounds