1. Field of the Invention
The present invention relates to a sideband bus setting system used for setting an integrated circuit (IC) which is mounted on an electronic device, or for reading out the state of the IC.
More particularly, the present invention has been made to configure the circuit to avoid that an improper setting of the IC or an improper readout of the state of the IC is performed by a sideband bus such as the Inter-Integrated Circuit (I2c) bus or the Two Wire Interface (TWI) due to an abnormal path.
2. Description of the Related Art
As the size of a computer such as a server has increased, the types and the number of ICs which are mounted on a unit of the computer have increased. Accordingly, it has become difficult to implement a consistent setting of all ICs through a main processor by using a main data path, and many ICs have a port for a sideband bus to perform the setting through a path different from the data path before the main processor starts access.
As standards of such sideband bus, the I2C which was proposed by Philips Semiconductors or the TWI (two-wire serial interface), which is a generalized standard of the I2C, is often used. The I2C operates in half-duplex and multi-dropped connection at a low speed from 100 KHz to 400 KHz, and is controlled by only two signal lines named SDA (serial data) and SCL (serial clock).
FIG. 1 illustrates an example of systems which are connected via the I2C bus. According to the I2C standard, a plurality of master devices can exist. However, generally, it is configured that a plurality of target devices 3 are connected to a master device 1 through I2C bus 4, as shown in FIG. 1. A unique device address has to be set to each of the target devices 3.
The setting of the device address depends on the ICs (or target devices). Some ICs have a fixed address and an address of some ICs can be arbitrarily set through an external pin, and the setting of the device address is performed depending on each target device or according to the specification of each target device.
In the example shown in FIG. 1, digits in a target device 3 indicate a device address in binary digit, in which the lower two digits (part indicated by boldface) indicate bits that can be arbitrarily set through an external pin 5. For example, #00 and #01 in the target device 3 are similar devices and the upper five digits out of seven digits are fixed. In the case of #00 of the target device 3, by connecting two address setting external pins to GNDs, the lower two bits is set to “00”. In the case of #01 of the target device 3, by connecting one address setting external pin to GND and another address setting external pin to VDD, the lower two bits is set to “01”. In the case of #30 of the target device 3, all of the seven bit addresses are fixed and any bits of the seven bit addresses cannot be arbitrarily set through external pins.
“The I2C-Bus Specification Version 2.1” is an example of the specifications of the sideband bus.
As described above, it is possible to connect 128 devices (two raised to seventh power) to an I2C bus according to the protocol. However, if the target device actually has only two bits for the address setting external pins, for example as shown in FIG. 1, there is a limitation that the number of target devices 3 coupled to the master device 1 through the sideband bus 4 is equal to or smaller than four (two raised to second power).
USPTO Backgrounds
USPTO Backgrounds