For goals like a higher speed of operation and a saving of power consumption, a challenge to higher integration of large-scale integrated circuits continues. To meet increasing demands for shrinkage of circuit-constructing wiring patterns and of contact hole patterns for cell-constructing inter-layer connections, the advanced semiconductor microprocessing technology becomes important.
The advanced microprocessing technology relies on the photolithography using photomasks, where various improvements such as immersion exposure and modified illumination are made. The photomask is one important area of the miniaturization technology as are the exposure tool and resist material. To obtain a photomask capable of affording a fine-size wiring pattern or fine-size contact hole pattern as mentioned above, efforts are made to develop the technique of forming a more fine and accurate pattern on a photomask.
In order to form a higher accuracy photomask pattern on a photomask substrate, it is of first priority to form a high accuracy resist pattern on a photomask blank. Since the photolithography for microprocessing semiconductor substrates employs reduction projection, the size of a pattern formed on a photomask is about 4 times the size of a pattern formed on a semiconductor substrate, which does not mean that the accuracy of the pattern formed on the photomask is accordingly loosened. It is rather necessary that the photomask pattern be formed at a higher accuracy than the accuracy of the pattern formed on the semiconductor substrate after exposure.
At the present, the size of a circuit pattern written on a semiconductor substrate by photolithography is far smaller than the wavelength of exposure light. If reduction exposure is carried out using a photomask having a pattern which is a mere 4-time magnification of the circuit pattern, the photomask pattern is not faithfully transferred to the resist film due to impacts such as interference of exposure light.
Super-resolution masks addressing the problem include OPC masks in which the so-called optical proximity correction (OPC), i.e., the technology for correcting the optical proximity effect to degrade transfer properties is applied to photomasks and phase shift masks which causes a phase shift of 180° between adjacent pattern features. For example, in some OPC masks, an OPC pattern (hammer head, assist bar or the like) having a size of less than half of a circuit pattern is formed. The phase shift masks include halftone, Levenson and chromeless types.
In general, a photomask pattern is formed by starting with a photomask blank having a light-shielding film on a transparent substrate, forming a photoresist film on the photomask blank, exposing the photoresist film to light or electron beam to write a pattern, and developing the photoresist film to form a photoresist pattern. Then, with the photoresist pattern made mask, the light-shielding film is etched to form the photomask pattern. To obtain a fine photomask pattern, it is effective to reduce the thickness of a photoresist film (i.e., thinner resist film) for the following reason.
If only the resist pattern is shrunk without reducing the thickness of a resist film, the resist pattern functioning as the etching mask for the light-shielding film has a higher aspect ratio (ratio of resist film thickness to pattern width). In general, as the aspect ratio of resist pattern becomes higher, the pattern profile is more likely to degrade. Then the accuracy of pattern transfer to the light-shielding film via the resist pattern as the etch mask is reduced. In extreme cases, the resist pattern partially collapses or strips off, resulting in pattern dropouts. In association with the shrinkage of a photomask pattern, it is necessary that the resist film used as the etching mask during patterning of a light-shielding film is thinned to prevent the aspect ratio from becoming too high. An aspect ratio of up to 3 is generally recommended. To form a resist pattern having a pattern width of 70 nm, for example, a resist film thickness of up to 210 nm is preferable.
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USPTO Backgrounds