In integrated circuit (IC) devices, magnetroresistive random access memory (MRAM) is an emerging technology for next generation embedded memory devices. MRAM is a memory device including an array of MRAM cells, each of which stores a bit of data using resistance values, rather than electronic charge. Each MRAM cell includes a magnetic tunnel junction (“MTJ”) cell, the resistance of which can be adjusted to represent logic “0” or logic “1.” Conventionally, the MTJ cell includes an anti-ferromagnetic (“AFM”) pinning layer, a ferromagnetic fixed, or pinned, layer, a thin tunneling barrier layer, and a ferromagnetic free layer. The resistance of the MTJ cell may be adjusted by changing the direction of the magnetic moment of the ferromagnetic free layer with respect to that of the fixed magnetic layer. In particular, when the magnetic moment of the ferromagnetic free layer is parallel to that of the ferromagnetic fixed layer, the resistance of the MTJ cell is low, corresponding to a logic 0, whereas when the magnetic moment of the ferromagnetic free layer is anti-parallel to that of the ferromagnetic fixed layer, the resistance of the MTJ cell is high, corresponding to a logic 1. The MTJ cell is coupled between top and bottom electrodes and an electric current flowing through the MTJ cell from one electrode to the other may be detected to determine the resistance, and therefore the logic state. However, various damages to the MTJ cell, including damage to the free ferromagnetic layer and the tunneling barrier layer during an etching in the fabrication, result in poor performance of the MTJ cell. Accordingly, it would be desirable to provide an improved MRAM structure and method of manufacturing thereof.
USPTO Backgrounds
USPTO Backgrounds