P-channel LDMOS is widely used as high side power devices due to reduced gate drive circuitry. When combined with n-channel LDMOS, p-channel LDMOS can be employed in level shifters in many applications such as motor drivers or display panels. A good specific on-state resistance/breakdown voltage (Rdson/BV) trade-off of n-channel LDMOS is possible due to the Reduced SURface Field (RESURF) principal since the handle wafer is grounded and drain forward biased. However, for p-channel LDMOS, the RESURF principle is inhibited because the drain and handle wafer are commonly biased to the same potential.
Some conventional designs have been developed to overcome this issue. In both Bulk and thick film silicon-on-insulator (SOI) technology, the vertical depletion can also be assured with a source metallization or gate polysilicon which acts as a field plate. The presence of the n-type floating layer associated with the field plate defines a double-RESURF effect which leads to a competitive Rdson/BV tradeoff. In a thin film SOI substrate, however, the small active silicon area reduces the possibility to define an n-type floating region without degrading the device Rdson. Consequently, only the effect of the field plate is possible and the doping concentration of the drift region which sustains the voltage has to be lowered, leading to an increase of Rdson.
USPTO Backgrounds
USPTO Backgrounds