Semiconductor devices are typically fabricated within the top 5-10 um of the surface of the substrate wafer. Given this constraint, devices fabricated using typical semiconductor processes have maximum operating power limitations that are proportional to the area the device occupies on the substrate surface. Therefore, a device needing a higher overall power limit must be created either by connecting many smaller devices on the surface of the silicon wafer or by increasing the lateral area consumed by a single device. The need to expand devices laterally to increase their power handling capability leads to an ineffective use of the substrate material. A method of manufacturing a semiconductor device that optimizes the use of the substrate material is needed in order to minimize the overall dimensions of the silicon required for constructing an active device.
USPTO Backgrounds
USPTO Backgrounds