1. Field of the Invention
The present invention relates to a nanowire fabrication method and a semiconductor element using a nanowire fabricated thereby, particularly to a method for fabricating a sidewall spacer nanowire in the frontend process and a semiconductor element using a nanowire fabricated thereby.
2. Description of the Related Art
The field-effect transistor (FET) using nanowire works at least four times faster than the traditional silicon transistor. Therefore, nanowire can be used to develop inexpensive high-efficiency element. Further, nanowire can reduce IC volume and favors their application in various portable electronic products, such as mobile phones and notebook computers. Besides, nanowire-based FET can be fabricated into high-sensitivity biochemical detectors via an ion-selectivity method or an enzyme-immobilization method. Therefore, nanowire application is a very promising technology.
Refer to FIGS. 1(a)-1(d) diagrams schematically showing the steps of the conventional nanowire fabrication process. Firstly, provide a substrate 10, and form a thermal oxidation layer 12 on the substrate 10, as shown in FIG. 1(a). An insulating dielectric layer may be a substitute for the thermal oxidation layer 12. Next, sequentially form a virtual gate 14 and a virtual gate dielectric layer 16 on the thermal oxidation layer 12, as shown in FIG. 1(b). Next, deposit a polysilicon layer 18 on the virtual gate dielectric layer 16, as shown in FIG. 1(c). Then, etch the polysilicon layer 18 with a dry etching method to form a polysilicon nanowire 19 around the sidewall of the virtual gate 14, as shown in FIG. 1(d). However, the conventional technology needs an additional photomask to form the virtual gate. Further, the polysilicon nanowire can only be formed in the backend process of the conventional technology, i.e., formed on the circuit having been formed on the substrate. Therefore, the element may have problems in integrating with related circuits.
Accordingly, the present invention proposes a novel nanowire fabrication method and a semiconductor element using a nanowire fabricated thereby to overcome the abovementioned problems.
USPTO Backgrounds
USPTO Backgrounds