In a virtualized computer system, a virtualization software layer, often referred to as a hypervisor, is installed on top of the hardware layer of the computer system to coordinate use of limited hardware resources for a number of virtual machines that may be instantiated on the computer system. A NIC (network interface controller) is one example of a limited hardware resource. A component of the hypervisor includes a device driver that communicates with the NIC to send and receive data to and from a connected network.
The device driver and NIC employ a set of buffers to which the NIC writes data using DMA (direct memory access) and a ring data structure to manage the buffers. The ring data structure is typically a circular queue of records, referred to herein as descriptors, which contain the buffers' addresses and additional state information. The ring is accessed through a consumer pointer, which is used by the NIC to find an available buffer to write data, and a producer pointer, which is used by the hypervisor to add new buffer addresses for use by the NIC. The set of available buffers is located in the hypervisor's memory space and serves as a staging area for incoming data so that the hypervisor is able to examine data written into the buffers by the NIC and identify the virtual machine to forward the data.
For each virtual machine executing on top of the hypervisor layer, the hypervisor also implements a virtual NIC through which it forwards network data intended for a guest operating system running in the virtual machine. From the perspective of the guest operating system, the virtual NIC acts like a hardware NIC, interacting with a NIC device driver in the guest operating system to receive and transmit data. Once the hypervisor identifies the virtual machine that is the intended recipient of incoming data, it copies the data into the memory space of the recipient virtual machine, simulating a DMA process by the virtual NIC. This copying of data from buffers in hypervisor memory to buffers in virtual machine memory is a significant source of processing overhead.
USPTO Backgrounds
USPTO Backgrounds