I. Field
The present disclosure relates generally to amplifiers, and more specifically to bias circuits for power amplifiers.
II. Background
A wireless device (e.g., a cellular phone or a smartphone) in a wireless communication system may transmit and receive data for two-way communication. For example, the wireless device may operate in a frequency division duplexing (FDD) system or in a time division duplexing (TDD) system. The wireless device may include a transmitter for data transmission and a receiver for data reception. Thus, the wireless device may process both analog and digital signals in order to provide communication and/or data services.
A radio transmitter's power amplifier is typically required to be linear and accurately reproduce an amplified signal from an input signal. For example, an amplifier that has a non-linear input/output relationship may cause the output signal to splatter over to adjacent radio frequencies. To address this, predistortion may be used to generate an inverse of the amplifier's gain and phase characteristics to compensate for the amplifier's non-linear input/output relationship to produce a more linear system with reduced distortion. Predistortion can be implemented as an analog or digital process.
Power amplifiers also suffer from memory effects. Memory effects are non-noise circuit characteristics that cannot be described by the steady-state nonlinear transfer function of the circuit. Power amplifier memory effects may significantly distort transmit signal integrity, which may show up as error vector magnitude (EVM) degradation. One approach to minimize memory effects is to create low output impedance from a bias circuit that biases the amplifier. Diode based bias circuits are a common biasing scheme in power amplifiers. However, this common biasing scheme may result in limited dynamic range and trade-offs affecting RF performance. For example, it is desirable to make the bias circuit as fast as possible to allow digital correction to be successful. However, fast diode based bias circuits are large and may load the RF input signal such that a drop in gain may occur.
It is therefore desirable to have a bias circuit with high dynamic range to support a wider range of bias conditions and low memory for use with power amplifiers.
USPTO Backgrounds
USPTO Backgrounds