This invention relates to semiconductor fabrication processing and more particularly to a method for forming large grain polysilicon films for semiconductor structures, such as thin film transistors used in random access memories.
In current technology to fabricate thin film field effect transistors, an intrinsic silicon film, ideally having high charge carrier mobility, is needed for the transistor channel. The conventional approach to obtain such a film is to anneal an amorphous silicon film either by rapid thermal annealing step or by low temperature furnace annealing, which requires considerable processing time. The resultant film has a large grain size and therefore the acceptable carrier mobility needed for the device. However, this approach requires a high temperature process in the case of rapid thermal anneal or long processing time in the case of furnace anneal. The high temperature should be avoided in most thin film transistor fabrication because of the extensive use of metal electrodes. The long processing time is not desired due to the slow through put required for each wafer to be processed.
A major problem that must be overcome is that the thin film transistor is formed after the metal lines of the memory device have been fabricated. Once metal lines are formed, the subsequent fabrication steps that follow must stay below the re-flow temperature, or melting point, of the metal used. The present invention discloses a method to form very-large grain silicon as a way to increase charge carrier mobility of a thin film transistor pullup device, while avoiding high temperatures and long annealing times.
Exemplary implementations of the present invention comprise processes for forming a large grain silicon film for use in a semiconductor assembly. The process first forms hemispherical grain (HSG) silicon over a semiconductor assembly substrate by deposition of HSG silicon directly, or by converting an amorphous silicon layer seeded with silicon nucleation sites into HSG silicon by annealing. Next, an amorphous silicon layer is formed directly on the hemispherical silicon grain surface. Next, an anneal step is performed to cause the amorphous silicon layer to convert into large silicon grains that use the hemispherical grain silicon as a base.
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