It is well known in the art that an integrated circuit (IC) device such as a semiconductor chip may communicate with other devices through electrical connections formed with solder balls. These solder balls, commonly referred to as controlled collapse chip connections (C4), are typically comprised of Lead and Tin, or a Lead-free material such as for example, alloys of Tin with Copper, Silver or a combination thereof.
It is also well known in the art that certain solders, particularly the Lead-free and Tin-rich solders, are highly reactive, and therefore require a robust barrier metallurgy under the solder bump in order to withstand aggressive high-temperature storage and electromigration (EM) requirements. Therefore, in a C4 structure, a metal stack known as the under bump metallurgy (UBM) or ball limiting metallurgy (BLM) is typically interposed between the solder bump and the IC device.
Historically, an Aluminum layer is interposed between the UBM and the IC device, for reasons such as internal wiring. Aluminum may also be used as a capping material to protect against oxidation of the terminal Copper metallurgy on the device. This cap structure, however, has performance and process integration limitations. Aluminum, and its associated liners (Ta/TaN/Ti/TiN), as a terminal metallurgy for the device is typically deposited as a film in the range of one (1) to two (2) microns. This metallurgical stack contributes to the series resistance of the circuit, and limits the current-carrying capability of the C4 joint.
Although the Aluminum layer, and its associated liners, are typically deposited directly on the Copper line, multiple additional dielectric layers, including a Nitride cap and Oxide and Nitride layers, are generally interposed between the dielectric layer and the Aluminum layer, for reasons well known in the art, such as adhesion. The fabrication of these additional dielectric layers typically requires multiple etches.
It is also known in the art that a Cobalt-based capping layer may be interposed between the UBM and the IC device, specifically on the metal contacts of the IC device. This Cobalt-based capping layer further improves EM resistance and stress migration.
Thus it is desirable to build a C4 structure that is more reliable, can withstand higher temperatures, and that has a lower series resistance such that the current-carrying capabilities of the C4 structure are improved.
USPTO Backgrounds
USPTO Backgrounds