1. Field of the Invention
The present invention relates to a decoding circuit for a playback signal in a magnetic recording and reading system which uses, and, more particularly, to a decoding circuit for a magnetic recording and reading system which decodes, pulse data from a playback signal of a head of a magnetic disk apparatus.
2. Description of the Related Art
With the increasing speed and compactness of computer systems has come a demand for magnetic disk apparatuses with higher speeds and higher densities. For this reason, because the frequency of the signals handled by the decoding circuit of the magnetic disk apparatus increases, and the recording density on the magnetic medium increases, there is a deterioration in quality. Therefore, it is desirable to have a decoding circuit for a magnetic recording and reading apparatus which is capable of performing very reliable decoding of a low-quality signal.
In a magnetic recording and reading apparatus, one proposed means of performing reliable decoding of a playback signal, the quality of which has deteriorated, is called a PRML (partial response maximum likelihood) decoding circuit, in which a partial response detector section and a maximum likelihood detector section are combined.
The technology in this PRML decoding circuit is classified according to form of the partial equalization used, there being PR4ML, EPR4ML (extended PR4ML), and EEPR4ML systems.
These PRML decoding systems, in comparison with the methods of the past in which the peak of the playback signal was detected, offer the same approximate error rate even when the signal S/N ratio is low. Additionally, EPR4ML is more effective for high-density recording than PR4ML, and EEPR4ML is more effective for high-density recording than EPR4ML.
However, there is a problem in that in the EPR4ML system, which is effective for high-density recording, the more E's there are, the more difficult the high-speed operation becomes from the standpoint of power consumption.
For decoding a playback signal which has been recorded at high density onto a magnetic disk, a fixed-delay tree search/decision feedback (FDTS/DF) decoder has been proposed, this decoder using a tree search in the decision section to provide almost the same level of performance as the above-noted PRML system. For example, a FDTS/DF decoder is proposed by Jaekyun Moon and L. Richard Carley in their publication of "Perfomance Comparison of Detecting Methods in Magnetic Recording" (IEEE Trans. on Magnetics, Vol. 26, No. 61, pp. 3155-3172, November 1990).
In magnetic recording and reading systems in the past, a plurality of annular tracks are formed on a magnetic disk, with data being written onto these tracks. A heading performs writing of data onto these tracks and playback of data from these tracks. The head is connected to a head IC, which has a servo circuit which performs positioning of the head over the magnetic disk and which has a write circuit for writing data and an amplifier which amplifies the read out data signal. The head IC has connected to it a read/write circuit which handles track information, zone information, and head information. The operation of the servo circuit and the read/write circuit is controlled by a control circuit. The control circuit performs data transfer with an external apparatus via an interface circuit (using an SCSI interface when the external apparatus is a personal computer).
A decoding circuit used in a magnetic recording and reading system of the past was connected to the output of a means for amplifying an analog signal, and included a variable-gain amplifier, a level detector, a variable-frequency oscillator (VFO), a pre-equalizer, and an equalizer. In the decoding circuit of this magnetic recording and reading system, the output of the pre-equalizer is input to the level detector, the VFO, and the equalizer. The output of the pre-equalizer is fed back to the variable-gain amplifier by means of the level detector, and is also input to the VFO for generation of the system clock. The equalizer is formed by a subtractor, a tree-search type decoder, and a feedback equalizer, and has a clock supplied to it which is generated by the VFO.
In this decoding system, in contrast to the PRML system, to enable free selection of the target equalization waveform, it is possible to design the transfer function of the equalizer in a manner that is advantageous with respect to such factors as input signal S/N ratio and resolution. Because the algorithm in the decision section is simple, an advantage in operating speed is provided in comparison with the PRML system.
However, in a decoder circuit used in a magnetic recording and reading apparatus of the past, while it is possible to make arbitrary setting of the target equalization waveform, it presents problems because, in this method, there is no gain-control method which uses an AGC loop and no clock-extraction method which uses a PLL loop, and also because gain control and clock extraction with respect to the arbitrary target equalization waveform are extremely difficult.
In addition, because the operating speed of a detection section which uses a tree search type feedback decoder depends upon the system clock, there is a problem in that the processing time must be completed within one cycle of the system clock, thereby making high-speed operation difficult.
USPTO Backgrounds
USPTO Backgrounds