1. Technical Field
The present invention relates to a device for reducing power consumption of a monitor and the method thereof. More particularly, it relates to a device for reducing power consumption of a monitor and the method thereof. Embodiments of the invention have low power consumption and a fast return time to normal operating status while operating in a single mode. Low power consumption and a fast return time are achieved by cutting off the power applied to a deflection drive and a heater according to the control signals inputted from the external signal source, while simultaneously applying a certain amount of dropped voltage to said heater.
2. Background Art
A device for reducing power consumption of a conventional monitor and the method thereof are described as below with references to FIG. 1. FIG. 1 is a schematic which illustrates a conventional device for reducing power consumption of a monitor. In a conventional device, control unit (MCU) 20 continually checks the input status of the vertical synchronized signals (V-SYNC) and the horizontal synchronized signals (H-SYNC) inputted from the external signal source (such as from the motherboard of P.C.). The device pictured in FIG. 1 then outputs a power-saving mode signal to output terminals L1 and L2 according to the input status of the V-SYNC and the H-SYNC signals. Power-supply terminal 30 within monitor 1 is respectively connected to a heater and a deflection drive terminal through two switching circuits which include transistors. The above switching circuits are respectively connected to output terminals L1 and L2 of control unit 20. When output terminals L1 and L2 apply a power-saving mode signal, the switching circuits turn on or off the power source to the heater and the deflection drive terminal as necessary. The above switching circuits respectively include switching transistors Q2 and Q4, in which resistors R2 and R4 are connected between the emitter and the base. The bases are connected to output terminals L1 and L2 and receive the power-saving mode signal therefrom. The bases are connected to the collectors of grounded buffer transistors Q1 and Q3 through resistors R1 and R3. The emitters are connected to power-supply terminal 30. The collectors are respectively connected to the heater and the deflection drive terminal. Two types of power-saving mode signals are respectively applied to the switching circuits connected to the heater and the deflection drive terminal. Switching transistors Q2 and Q4 turn on or off the power applied from power-supply terminal 30 to the heater and the deflection drive terminal. The buffer transistors Q1 and Q3 control the operation of switching transistors Q2 and Q4.
In the conventional device for reducing power consumption of a monitor, there are three types of power-saving modes, i.e., (1) a mode for input of only vertical synchronized signals (V-SYNC), (2) a mode for input of only horizontal synchronized signals (H-SYNC), and (3) a mode for no input of vertical synchronized signals or horizontal synchronized signals. With respect to each case, the operation of said device for reducing power consumption of a monitor is described as follows:
First, during normal operation (i.e., normal input of vertical and horizontal synchronized signals), control unit 20 outputs a high level signal (e.g., 5V) to two output terminals L1 and L2. Consequently, buffer transistors Q1 and Q3 have an “ON” status, by which the base voltage of switching transistors Q2 and Q4 becomes lower than the voltage of the emitter. As such, switching transistors Q2 and Q4 also have an “ON” status. Then, power is supplied to the heater and the deflection drive terminal, and the monitor goes into normal operation.
In Power-saving Mode 1, where there is input of only vertical synchronized signals (V-SYNC) from external signal source 10, control unit 20 senses that the horizontal synchronized signal (H-SYNC) is not being input and therefore outputs a low level signal (e.g., 0V) to output terminal L1 connected to the base terminal of buffer transistor Q1 on the side of the deflection drive terminal. Due to said signal, buffer transistor Q1 now has an “OFF” status, by which switching transistor Q2 also subsequently has an “OFF” status, and then the power to the deflection drive terminal is cut off. Nonetheless, the power to the heater is still being maintained.
In Power-saving Mode 2, where there is input of only horizontal synchronized signals (H-SYNC) from external signal source 10, control unit 20 senses that the vertical synchronized signal (V-SYNC) is not inputted. Therefore control unit 20 outputs a low level signal (e.g., 0V) to output terminal L1 connected to the base of buffer transistor Q1 on the side of the deflection drive terminal. The operations thereafter are the same as those of Power-saving Mode 1.
In Power-saving Mode 3, where there is no input of vertical nor horizontal synchronized signals from the external signal source 10, the control unit 20 senses the absence of input and then outputs low level signals to two output terminals L1 and L2. As such, the power supplied to the heater and the deflection drive terminal is thereby cut off.
With respect to Power-saving Modes 1 and 2, the power consumption is reduced by cutting off power to the deflection drive terminal while maintaining the power to the heater. As such, a fast returning time to the normal operation is still possible. However, there is a disadvantage of significant reduction of power-saving effects since the power is still maintained to the heater.
With respect to Power-saving Mode 3, by cutting off power not only to the heater but also to the deflection drive terminal, the power consumption could be substantially reduced. However, since re-heating is required to return to the normal status, there is a disadvantage of a rather slow returning time.
In other words, in the cases of Power-saving Modes 1 and 2, there is a problem of substantially high power consumption of approximately 10 W although the returning time to the normal status is fast (i.e., approximately three seconds). In the case of Power-saving Mode 3, there is a problem of requiring a longer returning time (2× or more) to normal status, as compared to those of Power-saving Modes 1 and 2 although its approximate power consumption is less than 5 W.
Moreover, with respect to the aforementioned conventional device for reducing power consumption of a monitor, the above control unit continually checks the input status of vertical and horizontal synchronized signals inputted from the external signal source. After determining the mode among three types of power-saving modes according to its input status, and according to its determination, the control unit carries out the functions of outputting signals to the output terminals. In this regard, there is an additional problem in that the designing and manufacturing of a control unit to implement such functions are rather complex.
USPTO Backgrounds
USPTO Backgrounds