Field of the Invention
The invention relates to a circuit substrate applicable in a semiconductor package field, a semiconductor package structure, and a process for fabricating a circuit substrate.
Description of Related Art
In the existing semiconductor package technical field, die carriers are commonly used for the interconnection between integrated circuit (IC) dies and the next-level electronic devices, such as motherboards, module boards, etc. A circuit substrate characterized by high layout density often serves as a die carrier with high pin count. The conventional circuit substrate is mainly composed of a plurality of patterned conductive layers and a plurality of dielectric layers alternately stacked to one another, and the patterned conductive layers are electrically connected through a plurality of conductive vias.
According to a flip-die bonding technique (a die package technology for high-pin-count applications), the circuit substrate is often employed as the die carrier, and the dies are electrically connected to a plurality of bonding pads of the circuit substrate by means of a plurality of conductive bumps arranged in area array. In order to reduce the pitch among the bonding pads for increasing the density of the bonding pads, large-sized openings on a solder mask layer on the circuit substrate may be applied to completely expose a die bonding region on the circuit substrate according to the related art, and traces on the circuit substrate are soldered to the corresponding conductive bumps through bonding segments of the traces in the die bonding region.
In view of the above, when a transitional segment of another trace exists between two adjacent bonding segments, the transitional segment need be narrowed down to reduce the distance between the two adjacent bonding segments. However, the transitional segment can only be narrowed down to a certain extent because the transitional segment must be capable of electrical transmission. This is unfavorable to the reduction of the pitch between the two adjacent bonding segments. In addition, the bonding area occupied by the bonding segments is determined by the widths and the thicknesses of the traces. To ensure the sufficient bonding area of the bonding segments, the traces can also be narrowed down only to a certain extent, which is also unfavorable to the reduction of the pitch between two adjacent bonding segments.
USPTO Backgrounds
USPTO Backgrounds