1. Field of the Invention
The present invention relates generally to a three-terminal type noise filter constructed using semiconductor ceramics having voltage non-linearity characteristics, and more particularly, to a three-terminal type noise Filter having varistor characteristics, capacitor characteristics and resistance characteristics.
2. Description of the Prior Art
In a semiconductor device such as an IC or a LSI employed in computer equipment, it has been important to prevent the destruction and the malfunction due to entrance of transient noise such as a static surge. As a method of protecting the semiconductor device from the entrance of transient noise, various methods have been conventionally tried. For example, attempts have been made to devise a method of setting a ground potential of an electronic equipment or a substrate and a method of arranging electronic component elements on a substrate. Alternatively, a method of absorbing noise by adding to a circuit a disk type varistor constructed by Forming electrodes on both major surfaces of single plate type semiconductor ceramics or a LC filter has been tried.
The method using the varistor out of the foregoing various methods is more suitable than the other methods because the varistor is simply added to the circuit, the varistor can be operated at a low voltage, and the capacity of the varistor is low. When the varistor is used as a noise absorbing element, it is necessary that the varistor voltage be as close as possible to a circuit voltage. On the other hand, in the electronic equipment such as the computer equipment, an operating voltage of the semiconductor device is relatively low. Accordingly, it is needed to reduce the varistor voltage of the varistor used.
Furthermore, miniaturization and thinning of the computer equipment or the like have proceeded in recent years. When the varistor is used as a noise absorbing element, it is required that the varistor cope with miniaturization and surface mounted technology (SMT). However, the above described disk type varistor cannot cope with miniaturization and surface mounted technology. Therefore, a monolithic type varistor has been proposed as an alternative to the disk type varistor (for example, Japanese Patent Publication No. 23921/1983).
However, the monolithic type varistor disclosed in the above described prior art document is approximately the same as the conventional disk type varistor in clamping voltage, although it can cope with miniaturization and surface mounted technology. Consequently, the semiconductor device cannot, in some cases, be protected from entrance of noise, resulting in a demand for improvement in noise absorbing power. In addition, although a breakdown voltage of the above described semiconductor device differs depending on the type, a breakdown voltage of a MOS IC or the like is, in many cases, approximately 40 to 60 V. On the other hand, the ability to restrain a voltage of the above described monolithic type varistor is two to three times the varistor voltage. The lower the varistor voltage is, the higher the ability to restrain a voltage is. Accordingly, in an impulse of a static charge or the like, a clamping voltage is made higher. As a result, the monolithic type varistor alone cannot, in some cases, protect the semiconductor device or the like.
Meanwhile, it is considered that if a resistance is added to the above described monolithic type varistor, however, the ability to restrain a voltage in excess of the ability of the monolithic type varistor can be obtained. When a resistance element is added to the monolithic type varistor as a separate component, however, the cost of the monolithic type varistor is increased by the cost of the resistance element. Moreover, the space required for mounting is increased. In addition, it is considered that the surface of the monolithic type varistor is coated with a resistance film. When the surface of the monolithic type varistor is coated with the resistance film, however, the resistance film is liable to be damaged due to the mechanical load from the exterior. As a result, electrical characteristics are degraded, thereby shortening the life.
USPTO Backgrounds
USPTO Backgrounds