Due to the decreasing scale of modern semiconductor devices, the efficiency of signal transmission along metallic interconnect lines has become a factor in the performance of semiconductor devices. For this reason, copper is increasing used in replace of aluminum due to the higher conductivity and correspondingly increased efficiency in signal transmission using copper. Copper-based interconnect lines are formed by patterning a series of trenches and/or vias into a dielectric layer. Copper is typically placed to form interconnection lines through a damascene (or inlaid) technique to fill recesses formed in the dielectric layer of a back-end-of-line (BEOL) structure. Multiple layers of interconnection lines can be formed by placing a cap layer followed by further deposition of dielectric material into which trenches and vias can be formed. The cap layer can serve the function of an etch stop during pattering of an overlaid dielectric layer. As such, multiple metalized layers can be formed.
While copper offers good conductive qualities, copper can pose various challenges that complicate the fabrication of semiconductor structures. Copper has the ability to diffuse into surrounding dielectric material. Even minute quantities of copper diffused into a dielectric layer poison the dielectric layer and lead to unpredictable performance. Therefore, a barrier material is often used to line a trench and/or via to protect the surrounding dielectric layer from copper diffusion. Similarly, the cap layer placed over the copper-based interconnection lines also serves to prevent diffusion into an overlying dielectric layer. Copper is also highly sensitive to oxidation and easily forms a film of copper oxide, particularly during the numerous heating steps that are employed in the fabrication of semiconductor structures. In a finished semiconductor structure, the copper-based interconnection lines have to be scrupulously guarded from oxygen and moisture to prevent oxidation over time, which is a further function performed by the cap layer.
Oxidation of copper-based components in a semiconductor structure can lead to several delirious effects. For example, copper oxide films exhibit poor adhesion to surrounding materials, such as dielectric materials, materials used as a copper diffusion barrier, and cap layer materials. To address the problem of poor adhesion to a cap layer, plasma gas treatments and/or plasma enhanced chemical vapor deposition (PECVD) are often employed to remove the copper oxide film and place a cap layer with good adhesion. Due to the shrinking dimensions of semiconductor structures, low-k materials are frequently used as a replacement for silicon dioxide to reduce parasitic capacitance between closely spaced interconnection lines. Newer low-k materials are susceptible to damage from plasma treatments employed to eliminate copper oxide and improve adhesion.
The current densities carried by the metallic interconnect lines increase as the cross-sectional area of the metallic interconnect lines is made smaller. The decreasing mass of individual metallic interconnect lines gives rise to complications from electromigration (EM). At higher current densities, the increased kinetic energy of individual electrons can result in significant momentum transfer to individual metal atoms within the metallic interconnect line. Over time, a mass transfer in the direction of electron movement can occur overtime as the result of high current densities. Poor EM reliability can be moderated by high-quality adhesion between any metallic-based interconnection line, including copper-based interconnection lines, and the surrounding materials.
USPTO Backgrounds
USPTO Backgrounds