A three-dimensional memory stacked the memory cells is known as a method to increase a capacity of a semiconductor memory. In the three-dimensional memory, an end of a stacked body having a plurality of memory cells is formed as stair-shaped, and the contact holes are formed to reach each stair. Each memory cell is electrically connected to a wiring located on the stacked body via this contact hole.
In forming the above-mentioned stair-shaped, a resist film is formed on the above-mentioned stacked body, and this resist film is exposed via a photomask, for example.
USPTO Backgrounds
USPTO Backgrounds