In the fabrication of integrated circuits, numerous integrated circuits are typically constructed simultaneously on a single semiconductor wafer. The wafer is then later subjected to a singulation process in which individual integrated circuits are singulated (i.e., extracted) from the wafer.
At certain stages of this fabrication process, it is often necessary to polish a surface of the semiconductor wafer. In general, a semiconductor wafer can be polished to remove high topography, surface defects such as crystal lattice damage, scratches, roughness, or embedded particles of dirt or dust. This polishing process is often referred to as mechanical planarization (MP) and is utilized to improve the quality and reliability of semiconductor stations. In typical situations, these processes are usually performed during the formation of various devices and integrated circuits on the wafer.
The polishing process may also involve the introduction of a chemical slurry (e.g., an alkaline or acidic solution). This polishing process is often referred to as chemical mechanical planarization (CMP). Much like mechanical planarization processes, chemical mechanical polishing is widely used in semiconductor processing operations as a process for planarizing various process layers, e.g., silicon dioxide, which is formed upon a wafer comprised of a semiconducting material, such as silicon. Chemical mechanical polishing operations typically employ an abrasive or abrasive-free slurry distributed to assist in planarizing the surface of a process layer through a combination of mechanical and chemical actions (i.e., the slurry facilitates higher removal rates and selectivity between films of the semiconductor surface).
During the normal course of operation, any number of reasons may necessitate the qualification or re-qualification of these mechanical and chemical mechanical polishing tools. Generally speaking, qualification procedures constitute the process steps required to calibrate and otherwise prepare a tool for production or service (e.g., so that the devices produced by the tool meet minimum predetermined specification requirements, as dictated by the demands of the individual fabs and/or product lines). For example, due to normal wear, a polishing pad may no longer be fit for service, and may need to be replaced by a new pad. In these instances, the qualification procedure collects a number of qualification characteristics (e.g., using the metrology data) measured during initial use of the new pad on sets of blanket or “test” wafers (i.e., wafers having only a thin film of unpatterned material). The qualification procedure then makes appropriate modifications to the tool recipe based on the measured qualification characteristics to ensure that future production runs comport with, for example, a number of minimum specification requirements. In a similar manner, a new tool (e.g., a tool beginning production of a new semiconductor product line) must also be qualified before it can be put into production.
Conventional methods for process-qualifying the above-described tools consume a large numbers of test wafers (approximately 10 to 15 test wafers) and require lengthy amounts of time. With regard to the large amount of time required, this is due to the nature of the stand-alone sensors and metrology devices (i.e., metrology devices that are separate from the tools) used to collect the required qualification characteristics. In particular, because the sensors are separate from the processing tools, in order to collect the qualification characteristics, a typical process first requires measuring preprocessing characteristics followed by physically moving a wafer into the processing tool, where the wafer is processed. After processing, the wafer is removed from the tool and returned to the metrology device, where post-processing characteristics are measured and used in conjunction with the preprocessing characteristics to obtain the characteristics used in qualifying the tool (i.e., the qualification characteristics).
With these conventional methods, the amount of time required to move the wafers back and forth between the tools and the metrology devices is significant. Furthermore, with tools having multiple components or chambers with each requiring qualification, it was more efficient to qualify the chambers in parallel, thus resulting in the consumption of additional wafers. To illustrate, the convention methods may use one wafer to qualify a first chamber or first tool component, a second wafer to qualify a second chamber or second tool component, and a third wafer to qualify a third chamber or third tool component.
In addition to the test wafers, conventional methods often require the testing of a “look-ahead” or patterned production wafer. The testing of these look ahead-wafers was used to ensure that the polishing process met specifications under actual production circumstances.
Recently, conventional in situ metrology devices have been able to eliminate the time required by stand-alone sensors to transfer wafers back and forth between the tools and the metrology devices. However, these conventional devices did not necessarily collect the qualification characteristics used to properly qualify a tool. For instance, conventional in situ metrology devices did not measure film thickness, which is used to qualify tools for, for example, nonuniformity and polishing rate. Consequently, conventional techniques were still required to qualify tools (such as polishing tools) requiring such measurements.
One of the disadvantages of conventional qualification procedures is the cost associated with the testing of these large amounts of blanket and test wafers. In addition to the cost of the test wafers, there is a significant time penalty associated with the qualification procedures. That is, the tools cannot be used to produce products during the qualification process. Furthermore, the processing of test wafers subtracts from the useful life of the polishing pads, since they have only a finite amount of polishing cycles before requiring a change.
Accordingly, increasingly efficient techniques for qualifying such polishing processes are needed. Specifically, what is required is a technique that greatly reduces the number of wafers required for properly qualifying a polishing process. In this manner, the cost and time associated with obtaining a production-ready polishing process may be minimized.
USPTO Backgrounds
USPTO Backgrounds