1. Field of Invention
The present invention relates to a method for manufacturing a semiconductor device. More particularly, the present invention relates to a method for manufacturing a shallow trench isolation.
2. Description of Related Art
An isolation region is formed in an integrated circuit for the purpose of separating neighboring device regions of a substrate and preventing the carriers from penetrating through the substrate to neighboring devices. Conventionally, the local oxidation of silicon (LOCOS) technique is widely utilized in semiconductor industry to provide isolation regions among the various devices in the substrate. Since the LOCOS technique has been used for quite a period of time, it is one of the most reliable and low-cost methods for fabricating device isolation region. However, the bird's beak structure of the field oxide formed by LOCOS technique limits the size of the integrated circuit. Hence, a shallow trench isolation (STI) technique has been developed and is currently applied in the integrated circuit process, especially in the sub-half micron integrated circuit process.
In the current process for manufacturing a STI, a silicon nitride layer is used as a mask layer and a trench is formed in the substrate by anisotropically etching. And then, an oxide material is deposited in the trench and fills the trench to form a STI. Next, a chemical-mechanical polishing step is used to planarize the oxide layer and to form an STI region. Therefore, the problem induced by the bird's beak can be overcome. However, the typical trench is a tapered trench; that is, the bottom of the trench is smaller than the opening of the trench. As line width becomes smaller and integration becomes higher, the width of the STI used to isolate the neighboring active regions is decreased. Hence, a bridging effect occurs between the neighboring active regions isolated by the STI. The bridging effect is especially obvious in processes below 0.18 microns.
USPTO Backgrounds
USPTO Backgrounds