1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a semiconductor memory device which has a majority logic for determining data to be read out to an external device.
2. Description of the Related Art
Electrically erasable programmable read-only memories (EEPROMs) are known, the contents of which can be erased electrically, and into which new contents can be written. EEPROMs are used, for example, in memory cards, in greater number than ultraviolet-erasable programmable read-only memories (UVPR0Ms) whose contents can be erased by ultraviolet light. This is because data can be erased from an EEPROM by means of electrical signals even after the EEPROM has been mounted on a circuit board. The memory cells of a typical EEPROM each consist of one nonvolatile transistor which has a control gate, a floating gate, and an erasing gate. These memory cells can, therefore, be relatively small. When an EEPROM is manufactured in compliance with, for example, the 2 .mu.m-design rule, each of its memory cells occupies an area of approximately 64 .mu.m.sup.2.
The basic operation of an EEPROM memory cell will be explained. At first, it will be described how to erase the data stored in the EEPROM memory cell. First, the source potential, drain potential and control-gate potential of the cell transistor are set at 0 V, and the erasing-gate potential at, for example, +27 V. Then, electrons are emitted from the floating gate to the erasing gate, by virtue of the Fowler-Nordheim tunnel effect. Hence, the floating gate is positively charged, lowering the threshold voltage of the cell transistor. As a result, a data "1" is stored into the EEPROM memory cell.
In order to write a data "0" into the EEPROM memory cell storing the data "1", the control-gate potential, drain potential, source potential and erasing-gate potential of the cell transistor are set at +21 V, 10 V, 0 V and +5 V, respectively. As a result of this, hot-electron effect occurs near the drain of the cell transistor, whereby the electrons generated due to impact ionization are injected into the floating gate of the cell transistor. The floating gate of the cell transistor is thereby charged negatively, increasing the threshold voltage of the cell transistor. The cell therefore stores a data "0". On the other hand, when the drain potential is set at 0 V, not +10 V, no hot-electron effect occurs, and no electrons are injected into the floating gate, whereby the data "1" remains in the memory cell. Thus, a data "0" is written into the memory cell when the drain of the cell transistor is set at a high potential, and a data "1" remains in the memory cell when the drain of the cell transistor is set at a low potential.
As has been pointed out, the memory cells of an EEPROM occupy but a relatively small area. An EEPROM is therefore suitable for a large-capacity memory, and can be used as an internal memory of a computer system, in place of an external memory such as a floppy disk.
FIG. 1 is a schematic representation of the storage area of a floppy disk of the type commonly used in general-purpose computers. Most double-side, double-density floppy disks have 1280 sectors to store 640 KB (Kilo-bytes) of data. As is shown in FIG. 1, the storage area of the floppy disk consists of four sub-areas--a boot-load program area B (1 sector), a fail-allocation table area FAT (2 sectors), a directory-entry area DE (4 sectors), and a data storage area DATA (1273 sectors). The data stored in the area B is a program for controlling the computer system, such as a boot-load program for starting the computer system. What is stored in the area FAT is the data dividing the data stored in area DATA into a plurality of regions. The directory-entry area DE is used to store file information such as the names of files, the sizes of files, and the like. The area DATA is provided for storing general data. The data stored in the boot-load program area B is seldom erased. In other words, a write/erase (W/E) operations is rarely carried out on the boot-load program area B. By contrast, the W/E operation is frequently performed on the fail-allocation table area FAT, since the data stored in this area FAT represents the condition in which the area DATA is used. The data stored in the area FAT includes data pieces representing defective ones of the sectors constituting the data storage area DATA. If these data pieces are unreliable, the floppy disk can no longer be used. Hence, it is required that data be stored more reliably than the areas B, DE, and DATA.
Most EEPROMs can be correctly subjected to the W/E operation, about 10.sup.3 to 10.sup.4 times. When an EEPROM has been accessed more times, the gate-insulating film of each cell transistor is likely to be broken when data is erased from the cell transistor, or the gate-insulating film of the cell transistor is likely to trap electrons from the vicinity of the drain when data is written into the cell transistor. Nonetheless, it is quite rare that two or more cell transistors simultaneously encounter such an adverse phenomenon; the probability for said phenomenon to occur in one cell transistor is 100 to 1000 parts per million.
Let us assume that an EEPROM is used in a general-purpose computer, in place of a floppy disk. If any of the cell transistors constituting a data storage area DATA undergoes defects, then data identifying the defective cell transistor is stored in the fail-allocation table area FAT in order to avoid use of the defective cell transistor. In this case, therefore, no problems arise. However, a problem does arise if one of the cell transistors constituting the area FAT undergoes said undesirable phenomenon. If this is the case, the EEPROM can no longer be used in a computer system. In view of this fact, it is impractical to use the conventional EEPROMs in computers, in place of floppy disks which have a fail-allocation table area FAT whose contents must not be destroyed or a altered.
USPTO Backgrounds
USPTO Backgrounds