1. Field of the Invention
The present invention relates to a method for manufacturing N-type and P-type chalcogenide materials, a doped homojunction chalcogenide thin film transistor and a method of fabricating the same. More particularly, the present invention relates to a method for manufacturing an N-type chalcogenide material and a P-type chalcogenide material, and a method of fabricating a doped homojunction chalcogenide thin film transistor using the N-type chalcogenide material and P-type chalcogenide material.
This work was supported by the IT R&D program of MIC/IITA [2007-S-032-01, Development for Multiple Platform Supported Mobile Application S/W Development Environment Technology].
2. Description of the Related Art
In general, with the development of information communication technology, technologies such as high-speed processing, large-capacity storage and the like have been developed. As a device used for information storage, for example, there are a photo information storage device known as a CD or a DVD and an electric memory device such as DRAM or the like. As devices used in the information storage and processing, for example, there is a photo thin film transistor or a CMOS image sensor. The photo thin film transistor is commonly fabricated by a CMOS process.
A low-cost low-temperature processed photo conductive thin film transistor (Photo-TFT) having relatively high-efficiency photo conductivity can be fabricated using unique characteristics of elements such as GeTe—Sb2Te3 (Ge2Sb2Te5:GST) including chalcogenide-based elements on a periodic table. Also, an undoped homojunction chalcogenide thin film transistor can be fabricated using a diode function expected from a principle to form a potential barrier generated from differences between charge concentration by a lone pair electron state of amorphous germanium antimony telluride (Ge2Sb2Te5) including the chalcogenide-based elements and charge concentration by a vacancy state of the same material Ge2Sb2Te5.
However, a method for manufacturing N-type and P-type chalcogenide materials by adding oxygen O2 including chalcogenide based elements based on the periodic table and a method of fabricating a thin type transistor using the manufactured N-type and P-type chalcogenide material, as described in the present invention, have not been publicly known.
The prior arts related to an optical recording material of optical information storage and a next generation non-volatile memory, which has been studied using Ge2Sb2Te5, will be described.
[Prior Art 1]
Prior art 1, which has features that if predetermined light is applied to Ge2Sb2Te5, its phase is changed from amorphous to crystalline or from crystalline to amorphous, determines on whether or not Ge2Sb2Te5 can be applied to optical information storage using an optically configured optical pick-up, if the result of the phase change is used.
[Prior Art 2]
Prior art 2, which has been proposed by Ovsinsky, the first proposer of a Ge2Sb2Te5 based phase change material, relates to a non-volatile memory PRAM using a phase change, that is, a method of applying a phase change phenomenon to an electric memory. This technique relates to a method of applying a switching phenomenon shown by mutually moving crystalline phases to the electric memory.
[Prior Art 3]
Prior art 3 relates to a thesis of an electric memory transistor that is fabricated using Ge2Sb2Te5 and the results of measured characteristics of the electric memory transistor is published. The prior art 3 basically corresponds to a method using a phase change mechanism obtained in the prior art 1 and the prior art 2, and relates to a method to apply the switching phenomenon which shows the states of mutually moving phases to the crystalline phase or the amorphous phase to a memory and a TFT.
A chalcogenide material has been known as a material having typical P-type conductivity due to unique characteristics of its atomic structure. The main factor to show the P-type conductivity has been known to be generated by a vacancy state within a band gap and owing to the unique characteristics of such an atomic structure, an N-type chalcogenide material has not been developed up to now.
FIG. 1 is a concept view of a structure of a photo thin film transistor fabricated using a general CMOS process. A structure of a photo thin film transistor actually fabricated through a CMOS process is more complicated.
Referring to FIG. 1, an amorphous silicon film 110 is formed on a silicon substrate 100 doped with impurity. Source and drain ohmic contact parts 120 for improving ohmic contacts are formed at both sides of the amorphous silicon film 110. The ohmic contact parts 120 are formed by ion-implanting the impurity into portions of the amorphous silicon film 110. A source electrode 140 and a drain electrode 150 are formed on the source and drain ohmic contact parts 120, respectively. A gate insulating film 130 is formed on the amorphous silicon film 110, the ohmic contact parts 120, and the source and drain electrodes 150. The gate insulating film 130 is formed using an oxide film. A gate electrode is formed on the gate insulating film 130 using a metal film 160.
In order to fabricate the conventional photo thin film transistor having the structure, a high temperature (for example, 500° C. to 1000° C.) process is required. In particular, the thin film transistor fabricated using the CMOS process of FIG. 1 uses a high-cost silicon substrate and requires the ion-implantation process for forming the ohmic contact parts. The thin film transistor must also need the hydrogenated and doped ohmic contact parts.
Most of TFTs currently used in a TFT-LCD display and/or a mobile phone or the like have the structure of FIG. 1.
In the case of the chalcogenide material, in order to utilize a layer having reference numeral 110 of FIG. 1 as a channel layer, a channel layer of the TFT should be first an N-type material or a P-type material, and in contrast, the ohmic contact parts having reference numeral 120 should be the P-type material or the N-type material. Such a structure has been known as the typical structure of the best transistor.
USPTO Backgrounds
USPTO Backgrounds