This invention seeks to establish the location of a seal inner perimeter (SIP) relative to the pixels on the display glass surface containing the color filter (CF) and/or transistor (TFT) of an active matrix liquid crystal display. The method of this invention is similar to processes and methods easily adaptable to, or compatible with, the processes used to make TFT substrates and/or color filters. The inventive design elements are incorporated into the AMLCD display prior to applying the seals. Conventional processes for sealing that are followed by conventional scribe and break technology or alternative finishing methods can then be used to make tiles with adequate tolerances for assembling into displays with a seamless appearance.
There are many requirements in designing a tiled flat panel display with a seamless appearance. The optical design parameters and the mechanical and electrical design parameters have been disclosed in detail in the aforementioned related U.S. application, Ser. No. 08/593,759. That reference teaches that a plurality of color tiles can be adjoined together to form a large, flat-panel display that has a seamless characteristic. In other words, the seams disposed between the tiles are imperceptible to the viewer.
One of the significant requirements for accomplishing the seamless appearance across the interfaces of two neighboring tiles relates to the pitch between pixels crossing a seam. The pitch between two tiles must be nearly equal to all pixel pitches within the tile display. The tolerance level of seam defects to the eye is very dependent on the viewing distance, which in turn is dependent on the pixel pitch. Larger pixel pitches allow more space for the seam components and their tolerances. This space includes the tolerance for waviness of two SIPs, twice the nominal location accuracy of the seal position, the width of two seals, the space allocated for the accuracy of the glass edges, and assembly positioning accuracy.
Thus the accuracy of the orthogonal tolerances of the two tile edges and the location tolerances of the seals and the SIP relative to the pixels must be maintained. In general, all location tolerance references are registered to the pixels, or fiducial marks relative to the pixels, which are accurately placed by the fabrication processes for the AMLCD components. Ideally, the method of positioning the seal should be compatible with that of processing the TFT substrate and/or the CF substrate. This invention describes methods of positioning the seal.
USPTO Backgrounds
USPTO Backgrounds