With the global trend of miniaturization, electronic devices are becoming smaller. For semiconductor devices that operate at high power levels, wafer thinning improves the ability to dissipate heat. As final thickness is decreased, the wafer progressively becomes weaker to support its own weight and to resist the stresses generated by post backgrinding processes. Thus, it is important to reduce the damages caused by backgrinding and improve quality.
The original thickness of silicon wafers during chip fabrication is 725-680 μm for 8 inch wafers. In order to obtain faster and smaller electronic devices, the wafers need to be thinned before dicing into individual chips. The grinding process consists of two steps. First, a coarse abrasive wheel grinds the surface to around 270-280 μm, but leaves behind a damaged Si surface, the (backside) surface of the Si wafer. Then, a fine abrasive wheel smoothes part of the damaged surface and grinds the wafer to 250 μm. Wafers with thicknesses down to 100-50 μm are virtually a standard requirement for some IC chip applications. For a long time now the most common thickness in smart cards has been about 180 μm. However, the thinner IC chips are becoming more common in smart cards. Therefore, a need exists for improved grinding tools capable of roughing or finishing hard work pieces, as well as for methods of manufacturing such tools.
USPTO Backgrounds
USPTO Backgrounds