A) Field of the Invention
The present invention relates to a micro structure suitable for use in a micro-electro-mechanical system (MEMS).
B) Description of the Related Art
As a micro structure, an acceleration sensor is known having a parallel plate capacitor formed on a silicon substrate (e.g., refer to Japanese Patent Laid-open Publication No. 2001-121499 (U.S. Ser. No. 09/395,711 filed on Sep. 5, 2000) which is incorporated herein by reference).
According to this prior art, a fixed electrode and a movable electrode constituting a parallel plate capacitor are both made of a polysilicon layer whose portion is fixed to a contact column (via). It is not easy, however, to firmly fix a polysilicon layer by only the bottom surface of the contact column.
FIG. 30 shows a micro structure formed during studies by the present inventor. On one principal surface of a semiconductor substrate 1 made of, for example, single crystal silicon, a first silicon oxide film 2, a silicon nitride film 3 and a second silicon oxide film 4 are formed having thicknesses of 10 to 100 nm, 50 to 100 nm, 1 to 5 μm, respectively. The silicon oxide film 2 is used as a pad film, the silicon nitride film 3 is used as an etching stopper film, and the silicon oxide film 4 is used as a sacrificial film.
A via hole 5a is formed through the silicon oxide film 4 by anisotropic etching. By continuing the anisotropic etching, a via hole 5b continuous with the via hole 5a is formed through the stack layer of the silicon oxide film 2 and silicon nitride film 3. A conductive polysilicon layer of 2 to 5 μm in thickness is deposited on the silicon oxide film 4, burying the via holes 5a and 5b, and thereafter the deposited layer is patterned by a selective etching process to form an electrode (or wiring line) 6.
Thereafter, the silicon oxide film 4 is etched and removed as shown in FIG. 31. The electrode 6 can therefore be used as a movable electrode of a cantilever type as indicated by a broken line. This connection structure has a weak connection force between the electrode 6 and substrate 1 so that the electrode 6 is likely to fall out of the via hole 5b. In the case that the electrode 6 is used as a fixed electrode (or wiring line) in the state of this connection structure shown in FIG. 30 (in the state that the silicon oxide film 4 remains unremoved), the electrode 6 falls off the via holes 5a and 5b in some cases by a film stress or the like.
According to a known method of manufacturing a cantilever made of polysilicon, impurities such as phosphorus are doped in situ into polysilicon in order to suppress camber of the cantilever while polysilicon is deposited, and thereafter a rapid thermal annealing (RTA) process is performed to relax stress in the deposited polysilicon layer (for example, refer to “In situ Phosphorus-doped Polysilicon for Integrated MEMS”, M. Bieble, G. T. Mulhern and R. T. Howe, the 8-th International Conference on Solid-State Sensors and Actuators, and Eurosensors IX. Stockholm, Sweden, Jun. 25–29, 1995, pp. 198–201).
According to the above-described prior art, phosphorus is doped into polysilicon at the concentration range of a phosphorus/silicon mol ratio of 0.00016 to 0.01. It is difficult, however, to sufficiently suppress camber of the cantilever.
FIG. 32 shows a micro structure formed during studies by the present inventor. On one principal surface of a semiconductor substrate 1 made of, for example, single crystal silicon, a silicon oxide film 2, a silicon nitride film 3 and a silicon oxide film 4 are stacked. The silicon oxide film 2 is used as a pad film, the silicon nitride film 3 is used as an etching stopper film, and the silicon oxide film 4 is used as a sacrificial film.
A via hole 5a is formed through the silicon oxide film 4 by isotropic etching, and thereafter a via hole 5b continuous with the bottom of the via hole 5a is formed through the stack layer of the silicon oxide film 2 and silicon nitride film 3 by anisotropic etching. Conductive polysilicon doped with phosphorus or the like is deposited on the silicon oxide film 4, and thereafter the polysilicon deposited layer is patterned by a selective etching process to form a conductive member 6. Before or after the polysilicon deposited layer is patterned, the polysilicon deposited layer is subjected to an RTA process to relax stress.
Thereafter, the silicon oxide film 4 is etched and removed. The conductive member 6 has a connection portion 6P connected to connection region 1a of the substrate 1 via the via hole 5b and an extension portion 6Q extending over and spaced from the silicon nitride film 3. The conductive member 6 can be used as a movable electrode of a cantilever type of, for example, an acceleration sensor having a parallel plate type capacitor.
With the cantilever structure having the above-described conductive member 6, the extension portion 6Q may warp upward as indicated by an arrow A shown in FIG. 32, may warp downward as indicated by an arrow B shown in FIG. 33 causing sticking the surface layer of the substrate, or may twist as indicated by an arrow C shown in FIG. 34. These warp and twist of the extension portion 6Q are considered based upon residual stress in the polysilicon deposited layer.
A Bosch method of alternately repeating isotropic etching and film deposition is known as a selective dry etching method for thick silicon (for example, refer to “Micro Machine”, Masayosi ESASI, Industrial Technology Information Service Center Ltd, pp. 55–56).
Since the Bosch method uses isotropic etching, the side walls are not vertical (isotropic). New facilities are required to be introduced, resulting in a cost rise.
With a dry etching method using as etching gas a mixture gas of Cl2 or HBr gas, and O2 gas, an etching rate is slow so that lower productivity cannot be avoided when thick silicon is etched. The side walls are not vertical but have a normal taper shape. It is difficult to have a good isotropic shape.
USPTO Backgrounds
USPTO Backgrounds