In electronics manufacturing, integrated circuit packaging is the final stage of semiconductor device fabrication, in which an individual die of semiconducting material is encapsulated in a supporting case that prevents physical damage and corrosion. The case, known as a “package,” supports the electrical contacts which connect the device to a circuit board. Typically, the die is mounted on a lead frame, which may be fabricated from a metal, for example, copper, and includes a number of leads which are secured to the frame. One well known method of connecting the contact pads on the die to the lead frame is wire bonding.
Flip chip technology is a surface mount technology in which the semiconductor die is “flipped” over such that the active surface of the die faces downward to the interconnect substrate. For flip chip packaging, a leadframe may be used as the interconnect substrate to produce a plastic molded enclosure, also referred to as a “molded package.” Electrical contact between the active surface of the die and the interconnect substrate is achieved by utilizing an area array of small solder “bumps” that are planted on pads on the active surface of the die. After the die is placed faced down on the interconnect substrate, the temperature is increased and the solder in the flip chip solder bumps reflows thereby bonding the die directly to the interconnect on the substrate. As such, the die makes electrical and mechanical connection directly to the interconnect substrate without the use of bond wires.
During assembly, a pick and place machine may be used to pick each individual die from a supply tray and place the die in a designated location on a lead frame strip that may hold dozens or hundreds of die. After packaging, the completed individual packages may be cut apart.
Other features of the present embodiments will be apparent from the accompanying drawings and from the detailed description that follows.
USPTO Backgrounds
USPTO Backgrounds