1. Field of the Invention
The present invention relates to semiconductor chips having characteristics in the mounting structure and the connecting structure and a display device using the semiconductor chip, and in particular, to reduction of the areas of the semiconductor chips.
2. Related Art
Recently, display devices using liquid crystal, organic EL (electro-luminescence) or the like are used in various fields such as laptop-computers and mobile phones because of the thin and light characteristics. In order to further reduce the thickness, area and weight, it is required to reduce the area other than the display screen, that is, to narrow the frame part.
A display screen is provided with a display unit, the periphery of which is surrounded by the frame part on which semiconductor chips for driving pixels of the display unit are mounted. These semiconductor chips are mounted on the frame part of the display device by the technique such as TAB (Tape Automated Bonding) or COG (Chip On Glass). In any mounting technique, it is effective to reduce the areas of the semiconductor chips, in particular, to reduce the width of the semiconductor chips for narrowing the frame part and reducing the weight. Particularly, in the COG technique, protruded electrodes (bumps) of the semiconductor chips are directly connected with the frame part of the substrate of the display device by using an electrically conductive adhesive such as an anisotropic conductive film (ACF). Therefore, the width of the semiconductor chips directly affect in narrowing the frame part of the display device.
As conventional techniques for narrowing the frame part of a display device, two examples will be shown below. A first conventional technique is an example in which wiring of the frame part and the bump structure of a semiconductor chip are devised (see the Japanese Patent Application Laid-open No. 2003-100982, page 4 and FIG. 2), and a second conventional technique is an example in which the shape of a semiconductor chip itself is devised (see the Japanese Patent Application Laid-open No. 2000-214477, page 3 and FIG. 1).
In the first conventional technique, in a case where semiconductor chips are mounted on a glass substrate and wirings for driving them are deposited, wirings within a chip connected in parallel with a wiring for driving is provided in the housing of the semiconductor chip in order to suppress the wiring resistance, to thereby obtain a liquid crystal display device with a narrow frame part and high display quality.
However, in the case of the first conventional technique for reducing the area, although the width of the semiconductor chip can be reduced by providing low-resistance wirings on the semiconductor chip side, drawing area of the wirings from the terminals around the semiconductor chip is large, which only contributes a little for narrowing the frame part.
On the other hand, in the second conventional technique, a semiconductor chip for driving a display device consists of a glass substrate having a length similar to that of the screen, and a drive circuit is formed thereon which is connected onto the glass substrate for displaying, to thereby reduce the drawing area of the wirings on the glass substrate for displaying and to reduce the area of the mounting part of the drive circuit.
The second conventional technique has such a configuration that a semiconductor integrated circuit for driving is formed on the substantially whole area of the drive circuit glass substrate, and on the semiconductor integrated circuit for driving, connecting electrodes are stacked in such a manner as to be able to suppress noise via an insulating film. Thereby, the area of the mounting part of the drive circuit is reduced to thereby obtain a liquid crystal display device with a narrow frame part.
However, in the second conventional technique, although area reduction is achieved by adopting a drive circuit glass substrate whereby the drawing area of the wirings is reduced so that the narrow frame part is realized, connecting electrodes are stacked so as to be able to suppress noise on a semiconductor integrated circuit for driving via an insulating film. Therefore, the electrode arrangement may be subject to a large limitation, or there may be a need to add a process of forming an insulating film of a sufficient thickness. Further, dummy electrodes (dummy bumps) are not referred to, and terminals are formed so as to be concentrated on one edge of the drive circuit glass substrate.
Therefore, a main object of the present invention is, in a semiconductor chip structure mainly using a drive circuit glass substrate, to realize an area reduction of a semiconductor chip without adding a process, and to provide a semiconductor chip structure having an excellent pressure balance when mounted, and by using it, to provide a display device with a narrow frame part.
In order to achieve the object, a semiconductor chip according to the present invention comprises: a chip body formed in an elongated shape mounted on the frame part of a display device; a semiconductor circuit, mounted on the chip body, for driving either of signal lines or scan lines of a display unit provided in the display device; and a plurality of terminals provided on the chip body. The plurality of terminals are connected with at least one of a signal wiring or a power supply wiring of the display device formed on another substrate different from the chip body, and a plurality of terminals connected with the same wiring among the wirings are formed in alignment in the longitudinal direction of the chip body.
According to the present invention, since the wiring with which the plurality of terminals are connected is formed on another substrate, the size of the chip body is not affected by the width dimension of the wirings. Therefore, it is possible to reduce the size of the chip body irrespective of the width dimension of the wirings, and also to narrow the width dimension of the frame part of the display device on which the chip body is mounted.
Further, since the plurality of terminals connected to the same wiring among the wirings are formed in alignment in the longitudinal direction of the chip body, the length of the wiring connecting the plurality of terminals with each other can be made to be the shortest. Accordingly, assuming the cross-section area of the wiring is constant, the resistance value of the wirings becomes small substantially, so that the width dimension of the wiring can be narrowed. Further, since the width dimension of the wiring is narrowed, it is possible to reduce the size of the other substrate. Relating to this effect, the width dimension of the frame part of the display device can be narrowed.
In the present invention, the positions of the terminals connected with adjacent wirings among the wirings may be shifted to each other in the longitudinal direction of the chip body such that intervals between the plurality of terminals connected with the same wiring are reduced.
With this configuration, the intervals between the plurality of terminals are reduced, so that the length of the wiring becomes shorter substantially. This enables to narrow the width dimension of the frame part of the display device as described above.
Further, in the present invention, the semiconductor circuit may include output terminals which are connected with the signal lines or the scan lines and are arranged in alignment near one long edge of the chip body. The terminals formed in alignment in the longitudinal direction of the chip body are terminals for supplying at least either of signals or power to the semiconductor circuit, and may be arranged near the other long edge opposite the one long edge of the chip body.
With this configuration, when the semiconductor chip is mounted on the frame part, the opposing two long edges of the chip body are supported by the plurality of terminals formed in alignment in the longitudinal direction of the chip body and the output terminals.
Accordingly, the long edge side of the chip body will never be damaged by a force applied to the semiconductor chip. Moreover, since there is no need to add dummy bumps to the chip body in addition to the terminals, it is possible to reduce the size of the chip body so as to narrow the frame part. Further, the present invention may be so configured that the chip body is divided into a plurality of pieces, and another signal wiring and power supply wiring are provided so as to pass through spaces between the terminals formed in alignment in the longitudinal direction of the chip body and the output terminals. Further, the present invention may be so configured that the chip body includes an inner circuit which generates at least either of a power supply voltage or signals, and wirings connected with the inner circuit is provided so as to pass through spaces between the terminals formed in alignment in the longitudinal direction of the chip body and the output terminals. Further, the plurality of rows of terminals, each of which is formed of the plurality of terminals connected to the same wiring, may be spaced apart in a direction along the long edge side of the chip body.
Further, assuming that the area of the terminal is X, the number of the terminals is n, the wiring length of the wiring extending in the longitudinal direction of the chip body is L, the average width of the wiring is W, the minimum width of the wiring affordable in the producing process of the semiconductor chip is W1, and the wiring formed on the other substrate and the wiring formed on the chip body are made of the same material, it is desirable that the number n of the terminals satisfy n<(WL/X)(½) or n<W/W1.
As the other substrate, a substrate provided in the display device in which the chip body is mounted, a flexible wiring board provided in parallel with the chip body, or a flexible wiring board on which the chip body is mounted is used. Note that a printed board may be used instead of the flexible wiring board.
Further, a display device using the semiconductor chip of the present invention comprises: a display unit formed inside the frame part of the display device; a plurality of pixels which are formed within the display unit and are drive-controlled by drive signals from the signal lines and the scan lines; and the semiconductor chip mounted on the frame part surrounding the display unit. The terminals provided on the semiconductor chip are connected to corresponding signal lines, scan lines, signal wirings, and power supply wirings provided in the display device, respectively.
By using the semiconductor chip according to the present invention as described above, it is possible to realize a display device with a narrower frame.
USPTO Backgrounds
USPTO Backgrounds