In recent years, integration of microprocessors has been proceeding. In such trend, a plurality of microprocessors each having one CPU have been integrated into a system, and a microprocessor equipped with CPUs has been developed. As for a microprocessor having CPUs, it is common that a memory and an I/O device which CPUs use are shared. A main reason for making arrangement like this is the restriction of the number of terminals with respect to the area of an LSI. Hence, the sharing as described above is materialized chiefly by designs of a bus and controller inside a microprocessor. In contrast, sharing a memory would bring on e.g. a problem that image data are not processed correctly when a bug of a controlling software program or the like causes an improper access, leading to a collision in a memory region. Therefore, it is important to avoid a collision in a memory region. In JP 2004-334410 is disclosed a technique for a circuit to detect and block an access to an improper address with a small overhead in circuit volume.
In contrast, to run a program on a microprocessor having CPUs, an operating system supporting such microprocessor is required. The design of such operating system has a deep connection with the forementioned form of sharing a memory and an I/O device. In regard to the form of an operating system supporting a microprocessor with CPUS, there have been the following two systems conventionally.
The first form is a symmetric multiprocessor system that a single operating system manages all of CPUs, a memory and an I/O device. The second form is an asymmetric multiprocessor system that an operating system is installed for each CPU. Especially, the asymmetric multiprocessor system has been adopted for microprocessors for embedded devices conventionally because of the ease of transfer of a software asset.
USPTO Backgrounds
USPTO Backgrounds