1. Field of the Invention
The present invention relates to a nonvolatile semiconductor storage device which can electrically rewrite data and a manufacturing method thereof.
2. Description of the Related Art
Conventionally, elements are integrated in a two-dimensional plane on a silicon substrate to form an LSI. In order to increase a memory storage capacity, a dimension of one element should be decreased (miniaturize), but the miniaturization becomes difficult from viewpoints of the cost and the technique. The technique of photolithography should be improved for the miniaturization, but for example, about 40 nm is a resolution limit in a current ArF immersion exposing technique, and thus introduction of a EUV exposing machine is necessary for further miniaturization. However, the EUV exposing machine is expensive, and thus is not realistic from the viewpoint of the cost. Even if the miniaturization is achieved, it is expected that with stand pressure between elements or the like reaches physical breaking point, as long as a driving voltage is not scaled. That is to say, an operation as a device is most likely to become difficult.
In recent years, therefore, in order to increase an integration degree of a memory, a lot of semiconductor storage devices where memory cells are arranged three dimensionally are proposed (see Patent Document 1: Japanese Patent Application Laid-Open No. 2007-266143, Patent Document 2: U.S. Pat. No. 5,599,724, and Patent Document 3: U.S. Pat. No. 5,707,885).
One of the conventional semiconductor storage devices where memory cells are arranged three dimensionally is a semiconductor storage device using a transistor with a cylindrical structure (Patent Documents 1 through 3). In the semiconductor storage device using the transistor with the cylindrical structure, a laminated-conductive layers with plural laminated layers as a gate electrode, and a pillar-shaped semiconductor are provided. The pillar-shaped semiconductor serves as a channel (body) section of the transistor. A memory gate insulating layer which can accumulate charges is provided around the pillar-shaped semiconductor. A structure including the laminated conductive layer, the pillar-shaped semiconductor, the memory gate insulating layer is called as a memory string.
In the semiconductor storage device having the memory string, the pillar-shaped semiconductor is formed by laminating amorphous silicon or the like in a plurality of batches. Therefore, in the pillar-shaped semiconductor, a natural oxide film is likely to be formed on an interface between the laminated layers. The natural oxide film raises the resistance of the whole pillar-shaped semiconductor, and thus there is a problem that an electric current reduces.
USPTO Backgrounds
USPTO Backgrounds