This invention relates to the field of integrated circuit processing. More particularly the invention relates to forming isolation structures between monolithic semiconductor devices.
There is continual pressure for integrated circuits to be increasingly faster and increasingly more powerful. Both of these objectives tend to be influenced by the size of the integrated circuits. By fabricating smaller integrated circuits, electrical pathways are shorter and more devices can be formed within a given space, which tends to result in a faster, more powerful integrated circuit.
It is evident that, in order to make the integrated circuit smaller, the structures that comprise the integrated circuit must themselves be made commensurately smaller. This reduction in the size of the structures of the integrated circuit can take one or more of several different forms. For example, the structures can either be scaled down to a smaller size, or the structures can be redesigned to a new form that takes less space. Typically, a combination of these and other methods of size reduction are used to accomplish the overall objective of reducing the size of the integrated circuit.
One structure that is commonly used in integrated circuits is an isolation structure. The isolation structure is typically formed between adjacent monolithic semiconductor devices, such as between the NMOS and PMOS devices of a complementary metal oxide semiconductor device. Of course, isolation structures are used in the fabrication of other types of monolithic semiconductor devices as well.
One primary design criteria in the formation of an isolation structure is that the structure is to provide electrical isolation between the adjacent monolithic semiconductor devices that it separates. In order to do this, the isolation structure is preferably formed of a material that is nonconducting, so that electrical carriers cannot easily penetrate through the isolation structure. Further, the isolation structure preferably extends to a depth that is sufficient to substantially prevent electrical carriers from traveling under the isolation structure and creating an electrical pathway between the adjacent monolithic semiconductor devices that inhibits proper operation of the integrated circuit.
Because the monolithic semiconductor material in which the devices are formed is typically unsuitable for use as an isolation structure without some type of additional processing, the isolation structure is typically formed by removing a portion of the semiconductor material, and then replacing the semiconductor material that is removed with an insulating material.
Unfortunately, as the size of the devices and the structures on the integrated circuit are reduced, it is increasingly difficult to create adequate isolation structures. For example, as the width of the isolation structure is reduced, it is more difficult to fabricate an isolation structure that extends to a depth that is sufficient to adequately isolate the adjacent active devices. This is because the desired narrow width of the isolation structure makes it difficult to create a deep isolation structure that is filled with the insulating material.
What is needed, therefore, is a system for forming an isolation structure that is relatively narrow and yet extends to a sufficient depth so as to adequately isolate adjacent monolithic semiconductor devices.
The above and other needs are met by a method of forming a narrow isolation structure in a semiconducting substrate. The isolation structure is a trench that has a bottom and sidewalls, and that is to be filled with an isolating material. The isolating material has desired electrical properties and desired chemical properties, and is substantially reactively grown from the semiconducting substrate.
A precursor material layer is formed on the bottom of the trench and on the sidewalls of the trench. The precursor material layer has electrical properties and chemical properties that are substantially similar to the desired electrical properties and the desired chemical properties of the isolating material. A substantial portion of the precursor material layer is removed from the bottom of the trench to expose the semiconducting substrate at the bottom of the trench, while leaving a substantial portion of the precursor material layer on the sidewalls of the trench.
The isolating material is reactively grown in the trench, where the isolating material preferentially grows from the exposed semiconducting substrate at the bottom of the trench at a first rate. The precursor material layer at least partially inhibits formation of the isolating material from the semiconducting substrate at the sidewalls of the trench. The isolating material forms from the sidewalls of the trench at a second rate, where the first rate is substantially higher than the second rate.
Thus, by forming a precursor layer that inhibits formation of the isolation material at the sidewalls of the trench, the isolation material preferentially grows from the bottom of the trench rather than expanding sideways from the sidewalls of the trench, which tends to widen the isolation structure. Because the precursor layer has properties that are substantially similar to those that are desired in the isolation material, the precursor layer remains at the sidewalls of the trench near the edge of the isolation structure. Therefore, the isolation structure functions as desired, but is narrower than it otherwise would be, if the precursor layer had not been formed.
In various preferred embodiments of the invention, the step of forming the precursor material layer is accomplished by oxidizing the semiconducting substrate on the bottom of the trench and on the sidewalls of the trench to form an oxide layer on the semiconducting substrate. The oxide layer on the semiconducting substrate is exposed to an agent that causes the oxide layer on the semiconducting substrate to at least partially inhibit formation of the isolating material from the semiconducting substrate.
In a most preferred embodiment, the step of oxidizing the semiconducting substrate on the bottom of the trench and on the sidewalls of the trench is accomplished by forming an oxide layer with a thickness of between about thirty angstroms and about five hundred angstroms, and most preferably about fifty angstroms. Further, the step of exposing the oxide layer on the semiconducting substrate to an agent is preferably accomplished by exposing the oxide layer to a plasma source of the agent, to incorporate a quantity of the agent into the oxide layer. Most preferably, the agent is nitrogen and the plasma source is a nitrogen plasma source.
The step of removing a substantial portion of the precursor material layer from the bottom of the trench preferably includes depositing a masking layer on top of the precursor material layer. The masking layer is removed from the precursor material layer at the bottom of the trench, and the precursor material layer that is exposed by removing the masking layer at the bottom of the trench is etched. In a most preferred embodiment the masking layer is amorphous silicon and the semiconducting substrate is substantially monocrystalline silicon.
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USPTO Backgrounds