The present invention relates to a cursor display control method in a graphic display system, and particularly to a display control apparatus which has a special storage region for exclusive use for a cursor pattern so that a desired shape is defined in the storage region and has a preferred cursor display function for displaying the defined shape as a cursor.
As a conventional graphic cursor display system, there has been known, for example, a system in which a cursor pattern is drawn on a frame buffer together with graphic information so that they are displayed on a screen. In this system, there is indeed an advantage that a desired cursor pattern can be displayed and hardware can be simplified, but the cursor pattern must be drawn on the frame buffer by means of a CPU or the like whenever a cursor is moved. It is further necessary to perform a processing for stacking or resuming the graphic information of an overlapped portion, when there has been a problem in the operating speed.
As an alternative one, there has been a system having a special frame buffer for exclusive use for a cursor to thereby eliminate the above-mentioned processing for stacking or resuming. In this system, however, a cursor pattern must be still drawn by means of a processing means such as a CPU whenever the cursor is moved, so that it is impossible to conspicuously improve the operating speed.
Therefore, a system having a special memory for exclusive use for a cursor in which a cursor pattern is defined in the memory and the display read processing for a frame memory and the display read processing for the cursor pattern are executed in parallel is described in the paper by Kazuo Minorigawa et al., entitled "CRT controller which can assign a drawing position with coordinates and has various commands such as painting-out, copying, etc.", Nikkei Electronics, pp. 221 to 254, May 21, 1984. FIG. 3 is a block diagram illustrating this system. This system is constituted by a CRT controller (ACRTC) 1000 for performing display control, a cursor pattern memory 1030, a counter 1010 for generating an address of the memory 1030, shift registers 1040 and 1050 for converting the data of the memory 1030 into a video signal, an output position adjusting circuit 1020 for performing display position control dot by dot on a screen, and a multiplexer 1060. According to the system, it is not necessary to perform a processing for rewriting a cursor pattern correspondingly to the movement of a cursor, so that it is possible to expect to make the speed of movement of the cursor high on the screen.
On the other hand, in order to solve the problem in the above-mentioned conventional technology in which it has been required to have a special memory for exclusive use for a cursor pattern, there has been a system as disclosed in Japanese Patent Laid-Open JP-A-63-52182. In this system, a portion of a frame buffer is used for a memory for use for a cursor pattern. That is, in this system, since it is not possible to make frame buffer access for displaying a cursor and a background thereof at the same time, a cursor pattern is read in advance in a non-display time of a CRT.
In the above-mentioned conventional technology, however, the access of a cursor pattern is performed not bit by bit but word by word of, for example, 16 or 32 bits. On the other hand, each picture element is displayed on a screen not word by word, but, for example, bit by bit in the case of monochrome display, or by four bits in the case of 16-color display. In order to move a cursor dot by dot on the screen, therefore, it has been necessary to provide, outside a CRT controller, a circuit for controlling a bit displacement within every word, as shown in FIG. 3. The above-mentioned circuit converts a one-word parallel signal into serial signals bit by bit while performing a dot position adjustment processing for the screen display of the cursor pattern. Since the above-mentioned serial signals are to be supplied as a video signal to a CRT, a high speed device is required for the above-mentioned circuit for producing the signals.
As has been described above, in the above-mentioned conventional technology, since it has been necessary to provide, outside a CRT controller, a circuit using a high speed device, there has been a problem that the system as a whole becomes expensive.
Moreover, since such a high speed operation required in the above-mentioned circuit is difficult to be realized by the current technique of CMOS (Complementary Metal Oxide Semiconductor) circuits which is being applied to large scale integrated circuits, there has been a problem when the above-mentioned circuit is integrated in the form of an LSI.
There has been proposed a further system as disclosed in Japanese Patent Laid-Open JP-A-59-95588, in which a special plane for exclusive use for a cursor is provided in a frame buffer as a memory for display in addition to another plane for general use for a screen, and parallel data supplied from the special plane for exclusive use for the cursor are shifted dot by dot in accordance with the displacement quantity set in a cursor address register and then converted into serial data.
Also in this conventional technology, however, it is necessary to provide, outside a CRT controller, a circuit for controlling the displacement dot by dot, and there is no description about integration of the circuit into an LSI. Moreover, the shift operation for the displacement must be performed synchronously with the parallel to serial conversion, resulting in prevention against making the speed high.
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USPTO Backgrounds