1. Field of the Invention
The present invention relates to an analog to-digital (A/D) converter. More specifically, the invention relates to a current mode A/D converter.
2. Description of the Related Art
In recent years, A/D converters which consume less power are desirable especially for low power digital circuits that accommodate analog and digital signals. A current mode A/D converter, which is less sensitive to digital noise, is common in such circuits.
A prior art A/D converter is illustrated in FIG. 18A. An analog input signal current I.sub.in and an offset current I.sub.off are applied to an input transistor of a current mirror circuit CM. The current mirror circuit CM has a plurality of output transistors which generate a plurality of current outputs. Specifically, in the case of an N-bit A/D converter, (2.sup.N -1) of the input currents I.sub.in are generated by the current mirror circuit CM which are respectively compared with (2.sup.N -1) of comparison currents S by current comparators H. The results of these comparison are input to an encoder EN to perform encoding to obtain the desired digital code.
FIG. 18B shows an example of a current-splitting type current mode A/D converter which has been disclosed in 1992 IEEE International Symposium on Circuit and System, Vol. 2, pp 585-588. The shown circuit is also constructed with a current mirror circuit having a plurality of current outputs, in which the analog input signal current I.sub.in and offset current I.sub.off are split into a corresponding number (2N-1) of comparators H for comparison with comparison currents I.sub.ref. The results of these comparisons are input to an encoder EN to perform encoding to obtain the desired digital code.
The circuit shown in FIG. 18A, requires a large number (2.sup.N -1) of comparison currents in proportion to the total comparison current which makes the overall current consumption large. In the circuit of FIG. 18B, the current consumption is large since the construction is the same as the prior art structure of FIG. 18A except for splitting of the input current. Furthermore, in the circuit of FIG. 18B as applied to an N-bit A/D converter, the input current becomes as large as 2N * (2N-1).DELTA.I (wherein .DELTA.I is the current corresponding to 1 LSB). This prevents lowering the power source voltage. Thus, in the prior art, high current consumption prevents lowering the power source current.
Also, in general, lowering the power source voltage causes degradation of precision of the mirror ratio of the current mirror or causes fluctuation of a threshold voltage. None of the prior art provides a solution for this problem.
As forth above, the conventional current mode A/D converters cannot lower current consumption and power source voltage and provide high precision.
USPTO Backgrounds
USPTO Backgrounds