1. Field of the Invention
Embodiments of the present invention relate generally to graphics processor unit memory systems and more specifically to a system and method for hardware-based GPU paging to system memory.
2. Description of the Related Art
Certain graphics processing systems utilize a virtual memory model to enable greater flexibility in the use of available memory resources. For example, a computing device with 2 gigabytes of system memory may include a graphics processing unit (GPU) with a locally attached 256 megabytes of frame buffer memory. In addition to storing frames of display information, the frame buffer memory may also store textures, application data structures, and subroutines for rendering, shading and related processing. Without a virtual memory model, a graphics application requiring more than 256 megabytes of frame buffer memory would not be able to run on a GPU with only 256 megabytes of frame buffer memory. However, with a virtual memory model, the GPU is able to utilize and expand into a portion of the 2 gigabyte system memory.
To localize memory bandwidth requirements associated with each client of the system memory, the virtual memory system transfers blocks of data, called “pages,” to the local memory subsystem utilizing the requested pages. Each page is typically fixed in size, for example 4 kilobytes, and represents a contiguous span of memory. Each page has a virtual address range within the virtual memory system and a corresponding physical address range that indicates the actual physical location of the page within some memory subsystem of the computing device. The virtual memory system maintains a mapping between virtual and physical memory locations. When the GPU requests access to a virtual address, the virtual memory system attempts to map the virtual address to the corresponding physical address. If the virtual address to physical address mapping indicates that the physical address of the requested page is within the GPU frame buffer memory, then the GPU accesses the page directly. However, if the requested page is not in the frame buffer memory, then the GPU generates a request, such as an interrupt, to a CPU-based page fault manager executing on the central processing unit (CPU). Typically, the CPU-based GPU page fault manager is a software module executing on the CPU as part of the GPU driver and support software. If the requested page is within system memory, the CPU-based GPU page fault manager transfers the page from system memory to the frame buffer memory and processing continues. If the page is not within system memory, then an erroneous request may be indicated. In some systems, a page fault in the system memory triggers a request to a still larger memory space stored on a mass storage system, such as a hard disk drive or RAID array. Each time the GPU requests access to data that is not in a page currently stored in frame buffer memory, the host CPU is interrupted to process the request. As the GPU increases system memory utilization, the page fault rate increases and the load on the host CPU increases.
One drawback of the above approach to implementing a virtual memory system with a GPU is that it significantly increases the load on the host CPU as applications executing on the GPU make more extensive use of virtualized memory. For example, the host CPU may readily experience a substantial computational load, in excess of 10%, as a result of modest paging activity between system memory and frame buffer memory.
As the foregoing illustrates, what is needed in the art is a more efficient technique for virtual memory management in systems employing a host CPU, system memory and a GPU that implements virtual memory.
USPTO Backgrounds
USPTO Backgrounds