Metal gate electrodes are currently being investigated to replace polysilicon gate electrodes in today's ever shrinking and changing transistor devices. One of the principal reasons the industry is investigating replacing the polysilicon gate electrodes with metal gate electrodes is to solve problems of poly-depletion effects and boron penetration for future CMOS devices and to get desirable threshold voltages. Traditionally, a polysilicon gate electrode with an overlying silicide was used for the gate electrodes in CMOS devices. However, as device feature sizes continue to shrink, poly depletion and gate sheet resistance become serious issues when using polysilicon gate electrodes. Accordingly, metal silicided gates have been proposed. In this approach, polysilicon is deposited over the gate. A metal is deposited over the polysilicon and reacted to completely consume the polysilicon, resulting in a fully silicided metal gate, rather than a deposited metal gate.
Complications can arise, however, during the silicidation of the gate electrodes. For example, in some conventional processes, where the gate is silicided before the source/drains are activated, the gates suffer from potential work function drift because of potential degradation of the gate dielectric/gate interface upon exposure to high thermal budgets (e.g., those in excess of 900° C.) that are required to activate the source/drains. When the gate is silicided before the source/drain activation, the high activation temperatures can drive the silicide through the gate dielectric and into the channel region.
To overcome these problems, other processes, where the gate electrodes are silicided after the activation of the source/drain, have been developed. In one such process, two different silicidation steps are performed, with a thicker metal being deposited for the gate electrode and a thinner metal being deposited for the silicidation of the source/drains. Though these processes address the problems associated with those processes where the gate is silicided before the source/drain activation, they require several different process steps. These steps include separately masking the source/drains and the gate electrode to protect them during their respective silicidation processes and using expensive chemical/mechanical polishing processes to remove the masks. These steps not only add cost and time to the manufacturing process, but they do not fully address all of the above-mentioned problems.
Additionally, in other processes, the source/drains are silicided before the gate electrodes. Given the difference in the thickness of the gate electrode and the source/drain junction depth, the silicide in the source/drains is driven deeper to the point of penetrating the source/drain junction during the silicidation of the gate. This can render the device inoperable, or cause shorts or spikes in the device.
Accordingly, what is needed in the art is a silicidation process that avoids the deficiencies of the conventional processes discussed above.
USPTO Backgrounds
USPTO Backgrounds