A conventional semiconductor (e.g., silicon) wafer contains a plurality of integrated circuit die, also referred to as chips. Conventional assembly processes such as pick and place use an electronic wafer map that includes information indicative of die attributes such as the exact location of each die on the wafer, and wafer-level probe test results for each die. The wafer map identifies the exact location of each die using a coordinate system that corresponds to the physical structure of the wafer. The probe test results (die quality) may be expressed as a single bit value, e.g., good (accept) or bad (reject), or a multiple bit value that provides additional information such as good first grade, good second grade, etc. The wafer map includes a plurality of bin numbers to categorize various attributes and/or properties of each die. For example, bin 1 may contain identification of all good first grade dice, bin 2 may contain identification of all good second grade dice, bin 3 may contain identification of all plug dice, bin 4 may contain identification of all bad dice, and bin 5 may contain identification of all edge bad dice. Each die may be assigned to a particular bin based on the results of the probe testing.
A wafer map host system receives the map data, provides storage, and enables data download into the production equipment to support processing of wafers to manufacture a semiconductor product. The wafer map host system transforms the lot's wafer map file into a suitable map file for the pick and place equipment to handle and prepares them for equipment download. On the manufacturing floor, as the wafer goes through the assembly process, a barcode may be generated for the wafer identification (ID) and may be attached to the wafer or to a carrier frame. When the wafer is ready to be processed at the pick and place equipment, the frame or wafer ID barcode is scanned and is used to request the wafer map from the wafer map host system. The pick and place equipment uses the downloaded wafer map to directly step to the good chips for pick-up.
At an Assembly/Test (A/T) facility, a wafer undergoes sawing to singulate the dice, and pick and place processing based on the wafer map. A wafer map, which specifies the exact location of all good dice, is used to control an accept/reject function of a typical pick and place system. The Die Attach assembly process depends on automated equipment following a wafer map perfectly to attach only Good Electrical Chips (GEC) to lead frames. Reference die alignment typically happens only at the start of each wafer. Any error that occurs after reference die alignment is complete is generally undetectable and will allow bad die to be mounted on lead frames.
Other features of the present embodiments will be apparent from the accompanying drawings and from the detailed description that follows.
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