1. Field of the Invention
The present invention relates to programmable integrated circuits. More specifically, the present invention relates to a circuit and method for supplying programming potentials to programmable devices at voltages larger than BVDss of programming transistors.
2. Background
User-programmable devices are known in the art. Such devices include, for example, field programmable gate arrays (FPGA's). To implement a particular circuit function in an FPGA, the circuit is mapped into the array and the appropriate programmable elements are programmed to implement the necessary wiring connections that form the user circuit.
Programmable elements such as antifuses are programmed by placing a programming-voltage potential across them that is sufficient to disrupt a normally high-resistance antifuse layer disposed between two antifuse electrodes to create a low-resistance connection between the two electrodes. The programming voltage potential is steered to the antifuse by programming transistors disposed on the integrated circuit.
As integrated circuit devices scale, the voltages that are applied to circuits are lowered, which necessitates the lowering of voltages used to program non-volatile devices on integrated circuits. In the case of antifuses, this means an ever thinning of films such that manufacturability, as well as leakage and breakdown voltage become difficult to control or tolerate.
Referring first to FIG. 1, an example prior-art arrangement for programming antifuses is shown in schematic diagram form. Any of antifuses 10, 12, 14, and 16 may be programmed by turning on the appropriate ones of transistors 18, 20, 22, 24, 26, and 28, to appropriately supply the potentials VPP and ground, as is known in the art. Transistor 30 is turned off to protect the output of inverter 32 when VPP is applied to track 34 or is present on track 34 through an already programmed one of the other antifuses.
USPTO Backgrounds
USPTO Backgrounds