1. Field of the Invention
An aspect of the present invention relates to a method for manufacturing a semiconductor device and more particularly to a method for manufacturing a CMISFET (Complementary Metal Insulator Semiconductor Field Effect Transistor) using a metal gate electrode.
2. Description of the Related Art
As the downscaling of the CMIFET progresses, a depletion caused by use of a polysilicon electrode gate becomes a problem, and a metal gate electrode has been used.
In a metal gate electrode structure, a threshold of a transistor is determined by an impurity concentration in a channel region and a work function of a gate electrode material. Therefore, in a dual metal gate structure, it is desired to use a metal gate material having an optimum work function for each of an n type MISFET (which will be hereinafter referred to as an nMIS) and a p type MISFET (which will be hereinafter referred to as a pMIS) (for example, see JP-2002-329794-A).
However, there has not been developed a practical method for respectively fabricating metal gate electrodes having optimum work functions for the nMIS and pMIS. It is desired to develop the practical method.
USPTO Backgrounds
USPTO Backgrounds