The present invention relates to an apparatus for positioning circuit components and more specifically relates to an apparatus for positioning circuit components at predetermined positions in order to mount the components on printed circuit boards.
In order to fabricate electronic circuits, selected electronic parts are generally mounted on a printed circuit board. In this case, it is necessary to arrange these electronic parts at predetermined positions on the printed circuit board. Conventionally, a hole is formed in the printed circuit board as a reference and the hole is utilized to position the printed circuit board mechanically so that each circuit component can be mounted on the board at points defined relative to the outline of the printed circuit board.
However, this conventional technique for positioning and mounting electronic components on printed circuit boards has resulted in large errors due to the effective accuracy of the hole punched through the board relative to the printed patterns, the printing accuracy of the printed patterns, and deformation of the printed circuit board caused by the heat generated when the board is dipped in molten solder. In addition, due to such factors as the material and configuration of the printed circuit board, it is impossible to mount electronic components on the printed circuit board in this way with high accuracy. In cases where electronic components having a great number and density of lead legs as in the case of flat package IC's, the lead legs are not always correctly connected to corresponding connection patterns so that highly reliable component mounting cannot be achieved.
Hence, the mounting of high-density electronic components depends on manual labor. However, productivity is quite poor in the case of manual operations and production costs increase accordingly.
To cope with these problems, pattern recognition techniques may be adopted to position electronic components on printed circuit boards. In this case, productivity and cost are still in question and these techniques are not put into practice.
A Japanese Utility Model Application Unexamined Open No. Sho 59-61571 has proposed that to position electronic components such as flat package IC's on the printed circuit board, the lead legs of the electronic components be directly fitted into recessed parts of solder dips. However, this technique cannot be applied to components with coplanar or low-angle lead legs. In addition, it cannot cope with components with deformed terminals. Furthermore, it is not practical and hardly worthwhile to form recesses in solder bosses on the printed circuit board for each lead leg of each electronic component to be connected to a printed circuit pattern.
USPTO Backgrounds
USPTO Backgrounds