Electronic circuit boards utilizing a multitude of integrated circuit (IC) applications are manufactured in huge numbers worldwide. Each of the IC's, or chips, includes a large number of circuits that are accessed by metal leads, or pins. Because of the increasing circuit density of the chips, a growing problem with IC's is identifying the numerous pins and their corresponding circuits.
High pin density also leads to problems when assembling, testing, and/or troubleshooting the boards. To test individual circuits, a metal probe must be brought into contact with the appropriate pin. The greater the pin density, the more difficult it is to achieve contact with the desired pin, and to avoid contact with adjacent pins. It would thus be beneficial to have a means of guiding a probe to the desired pin.
There are several current art methods directed to the identification of the various pins on a chip. In some cases, individual pins of through hole circuit boards are identified with wire wrap tags on the bottom of the IC. While this system may be employed where the number of pins to be identified is small, the method becomes increasingly unworkable if a large number of pins is to be identified.
A more thorough method of pin identification is disclosed in U.S. Pat. No. 5,051,870, "Electronic Socket Attachment Method and Identification System", issued to John A. Companion, Sep. 24, 1991. The Companion technique envisions a matched set of adhesive labels. A first of the labels is affixed to the top surface of the chip, and a second mirror image label is affixed to lower surface. Additionally, a doublesided adhesive socket sticker is included with the identifying labels.
Clearly, the prior art methodology has technical shortcomings and/or is needlessly complex. Also, there is no convenient technique to establish a probe guide with the pin indicating means.
Accordingly, it is an object of the present invention to provide a simple, accurate means of pin identification on an IC package.
It is a further object of the present invention to provide a means of guiding a probe to a selected pin, and reducing the possibility of contact with an adjacent pin.
It is a still further object of the present invention to provide an identification means that is an integral part of the IC package.
USPTO Backgrounds
USPTO Backgrounds