1. Field of the Invention
Apparatuses and methods consistent with the present invention relate to an inductor integrated chip and a fabrication method thereof so as to be electrically connected to an inductor through a connecting electrode formed on a packaging wafer.
2. Description of the Related Art
Circuit chips for multiple functions have been developing according to development of electronic technologies. There are chips requiring an inductor such as a filter and duplexer. The chips requiring the inductor are fabricated in a small inductor integrated chip form in which the inductor and various circuit elements are integrated on a wafer.
In such chips, an inductor is generally fabricated in a spiral or meander shape. In the case of a spiral inductor, one end of the spiral inductor is located within the spiral structure and the other end of the spiral inductor is located out of the spiral structure. The one end is connected to an external power source and the other end is connected to another circuit element in the inductor integrated chip. In the case of a meander inductor, one end of the meander inductor is connected to an external power source and the other end is connected to another circuit element in the inductor integrated chip.
In a conventional inductor integrated chip, one end of an inductor is connected to an external power source using a metal film formed on a wafer. That is, the metal film is bonded on the wafer, an insulation layer is bonded on the metal film, and a part of the insulation layer is etched so that a part of the metal film is exposed. Next, the inductor is formed on the insulation layer and the one end of the inductor is connected to the exposed part of the metal film. Thus, the metal film is connected to the external power source to provide an electric current into the inductor.
In the above-described conventional inductor integrated chip, since power is supplied to the inductor along the surface of the wafer, the resistance value becomes high. The Q value of an inductor is in inverse proportion to the resistance value so that the high resistance value reduces the Q value of the inductor. Additionally, the parasitic capacitance of the metal film and wafer affects the performance of the inductor integrated chip. Therefore, the performance of the inductor integrated chip decreases.
Furthermore, the metal film and insulation layer have to be additionally formed under the inductor so that the fabrication process of the inductor integrated chip becomes complicated and the size of the inductor integrated chip becomes bigger.
USPTO Backgrounds
USPTO Backgrounds