1. Field of the Invention
The invention in general relates to the fabrication of integrated circuits and more particularly to an apparatus and method for improving metal coverage at a step in the integrated circuit structure.
2. Statement of the Problem
As is well-known, integrated circuits, sometimes called semiconductor devices, are generally mass produced by fabricating hundreds of identical circuit patterns on a single semiconducting wafer, which wafer is subsequently sawed into hundreds of identical dice or chips. While integrated circuits are commonly referred to as "semiconductor devices" they are in fact fabricated from various materials which are either electrically conductive, electrically non-conductive, or electrically semiconductive. Silicon, the most commonly used semiconductor material, can be used in either the single crystal or polycrystalline form. In the integrated circuit fabrication art, polycrystalline silicon is usually called "polysilicon" or simply "poly", and shall be referred to as such herein. Both forms of silicon may be made conductive by adding impurities to it, which is commonly referred to as "doping". If the doping is with an element such as boron which has one less valence electron than silicon, electron "holes" become the dominant charge carrier and the doped silicon is referred to as P-type silicon. If the doping is with an element such as phosphorus which has one more valence electron than silicon, additional electrons become the dominant charge carriers and the doped silicon is referred to as N-type silicon. Silicon dioxide is also commonly used in integrated circuits as an insulator or dielectric. Its use is so common that in the art is generally referred to as "oxide" without ambiguity.
Integrated circuit fabrication may begin with a lightly-doped P-type silicon substrate, a lightly-doped N-type silicon substrate, or lightly-doped epitaxial silicon (deposited crystalline silicon) on a heavily doped substrate. For the sake of simplicity, the invention will be described using lightly-doped P-type silicon as the starting material, although it may be implemented with other materials as the starting point. If other materials are used as the starting point, there may be differences in materials and structure as is well-known in the art, e.g. with N-type silicon as the starting point dopant types may be reversed, or P-type wells may be introduced.
The advantages of building integrated circuits with smaller individual circuit elements so that more and more circuitry may be packed on a single chip are well-known: electronic equipment becomes less bulky, reliability is improved by reducing the number of solder or plug connections, assembly and packaging costs are minimized, and improved circuit performance, in particular higher clock speeds. However, the smaller the size, the more difficult it is to fabricate and locate individual parts, such as contacts, within the specifications and tolerances required.
Integrated circuit memories are generally the most densely-packed integrated circuits commonly manufactured today. In memories and other structures requiring densely packed contacts, contacts are conventionally fabricated by creating a photolithographic mask containing the pattern of the contacts to be fabricated, coating the wafer with a light-sensitive material called photoresist or resist, exposing the resist-coated wafer to ultraviolet light through the mask to soften or harden parts of the resist depending on whether positive or negative resist is used, removing the softened parts of the resist, etching the wafer to remove the part unprotected by the resist, and stripping the remaining resist. Generally the etching process is designed to form wells which penetrate the semiconductor structure down to the areas to which electrical connection is to be made. An area in a integrated circuit to which electrical connection is to be made is generally called an active area (AA). Current integrated circuit technology often includes a thin layer of diffusion barrier material, such as titanium nitride (TIN) or titanium tungsten (TiW), interposed between the AA and the metal contact which connects the active area to an electrical source. This diffusion barrier layer prevents interdiffusion of the material in the active area, generally silicon, and the contact metal. After the diffusion barrier is laid down, a layer of metal is then deposited on the semiconductor wafer to fill the wells. After the metal layer is laid down, it is then etched back to remove all the metal from the various surfaces of the semiconductor wafer, except the metal in the wells. The metal which fills the well is generally called a "plug". A metal interconnect which may be a bit line or a word line for example, is then deposited which connects the plugs to an appropriate circuit.
In prior generations of integrated circuits, aluminum or doped polysilicon have been used as the plug "metal". As the contacts have become smaller, especially in sub-micron sizes, tungsten has become the metal of choice, the plugs made of tungsten have become known "tungsten plugs" and a specialized field of engineering has developed generally called "tungsten plug technology". Generally, aluminum is used for the metal interconnect line.
In semiconductor devices, such as memories, where the contacts are so densely packed as to require sub-micron contact sizes, the wells have high aspect ratios, that is the wells are relatively deep compared to their width. In such high aspect ratio wells, as the plug metal is laid down, it tends to cover over the hole before the metal layers covering the opposite sides of the wells meets. This forms an open area in the well called a "keyhole". When the plug metal layer etch back is performed, the keyhole is opened, which forms an irregular upper surface on the metal plug in the well. Further, the TiN diffusion barrier material generally etches faster than the tungsten. This creates structures called "barrier fangs" around the outer periphery of the well where the TiN lining the sidewall has been eroded more deeply than the metal plug, further increasing the irregularity of the upper surface of the metal plug. It is very difficult to form a good contact between this irregular upper surface of the tungsten plug and the aluminum interconnect line. Metal applied to such irregular surfaces tends to crack or break over time, which can cause a defective integrated circuit and can create major reliability problems. There is a need for apparatus and methods that will permit good electrical contact between the aluminum interconnect line and the tungsten plugs to be routinely made and prevent defective integrated circuits.
In addition to the above problems, in order to make sure that all plug metal is removed from critical surfaces, it is usually necessary to "overetch" in the tungsten etch process, that is, etch so much that the metal plugs recede in the wells. This overetch makes it even more difficult to make good contact between the metal plugs and metal lines. Thus there is a need for apparatus and methods that can create reliable electrical contact between the metal lines and plugs even when the plugs are recessed and have an irregular upper surface.
One solution to the problems discussed above has been to use a plug of doped polysilicon rather than a plug of metal. However doped polysilicon is not as good a conductor as metals such as tungsten and aluminum, and the use of a doped silicon material adjacent silicon material of dissimilar material can create P-N junction diodes that can alter the electrical properties of the semiconductor device. Thus this "solution" can create larger problems than the problems it solves. There is a need therefore for a plug design that consistently produces good electrical contact between the active areas and metal lines in semiconductor devices and which does not create high resistivity, P-N junction diodes, and other electrical problems.
The wells discussed above appear in cross-section as a double step, i.e. a step down and a step up. The problems discussed above with respect to filling the wells and making electrical contact with the plug in the well are special cases of the problems generally associated with step coverage of aluminum metal over recessed tungsten plugs in semiconductor fabrication. Step coverage has consistently been a problem in semiconductor device fabrication when the covering material is aluminum. Thus there is a need for apparatus and methods which improves step coverage by aluminum over recessed tungsten plugs.
3. Solution to the Problem
The present invention solves the above problems by providing a process in which, prior to formation of the metal line, a thin layer of doped polysilicon is deposited which fills in the recessed well and smooths out the irregular surface of the tungsten plug. Preferably, the deposition of the poly layer is followed by planarizing by either a dry etch or a chemical mechanical polish. This creates a poly fillet which makes good contact with the irregularities, fills the recess, and makes a smooth surface to which it is easy to make electrical contact with long-term reliability.
USPTO Backgrounds
USPTO Backgrounds