1. Field of the Invention
The present invention generally relates to a package structure. More particularly, the present invention relates to a package structure of a chip.
2. Description of Related Art
Modern electronic equipment relies heavily on printed circuit boards on which semiconductor chips, or integrated circuits (ICs), are mounted. The mechanical and electrical connections between the chip and the substrate have posed challenges for chip designers. Three well known techniques for interconnecting the IC to the substrate are: wire bonding, tape automated bonding (TAB) and flip-chip.
A wire bonding technology is a common chip packaging technology applied to electrically connect a chip to a substrate. Here, the substrate is, for example, a circuit board. Generally, the wire bonding technology includes forming a stud bump in a wire bonding pad region of the substrate with use of a stud bump machine and extending wires upward with a distance. After that, the wires are moved downward to a chip pad region and are stitched. By applying the wire bonding technology, the chip and the substrate can be electrically connected to each other by means of the wires, and thereby signals can be transmitted between the chip and the substrate through the wires.
However, the chip disposed on the substrate is at a higher level than the upper surface of the substrate, so the loop height of the wires would give rise to an increase in the thickness of the package structure. Therefore, the package structure using wire bonding process is hard to meet the low-profile requirements.
USPTO Backgrounds
USPTO Backgrounds