(1) Field of the Invention
This invention relates to the testing method and the testing device for semiconductor integrated circuits related to the gradation output voltages of semiconductor integrated circuits having the function of outputting a plurality of gray scale levels (hereinafter referred to as “gradation levels”) and a plurality of DA converters (hereinafter referred to as “DAC”). It relates to the testing method and the testing device for semiconductor integrated circuits wherein the respective DAC can execute the output of the gradation output voltages in a short time and with a high accuracy. Here, gray scale level means the output voltage level determining the brightness or darkness level related to the dot display of liquid crystal panels and so on.
(2) Description of the Prior Art
Accompanying with the high definition of the liquid crystal panels, the liquid crystal driver LSI mounted on liquid crystal panels progresses towards multi-output and multi-gradation. The liquid crystal driver LSI has a “Gamma correction resistor circuit”, or a “Gamma correction capacitor circuit” as a base voltage generation circuit integrated inside the device. Voltage is applied to the base power supply input terminals of this base voltage generation circuit. The number of gradation levels of the liquid driver LSI is determined by the division ratio (resistance division ratio in the case of Gamma correction resistor circuit, and capacitance division ratio in the case of Gamma correction capacitor circuit) for this applied voltage. The more minutely refined this division ratio is, the more gradation levels there are.
In addition, to carry out this multi-gradation display, the liquid crystal driver has built-in DACs (converts digital input image data into analog gradation output voltage) corresponding to the number of gradation levels, and outputs the gradation voltages. For example, a liquid crystal driver for 64 gradation display use has a 6 bit built-in DAC, a liquid crystal driver for 256 gradation display use has a 8 bit built-in DAC, and a liquid crystal driver for 1024 gradation display use has a built-in 10 bit DAC.
In the test for a multi-gradation, multi-output liquid crystal driver such as these, whether all the respective gradation voltage values output from the DACs have been output to the correctly converted voltage values corresponding to the digital image data of each level, or, between each of the DACs, whether the output gradation voltage values are mutually uniform, is tested.
Taking a liquid crystal driver with a built-in DAC of m output and n gradation levels as an example, the conventional test method will be described.
In FIG. 1, a schematic block diagram of a circuit of conventional semiconductor test equipment made of a liquid crystal driver and a high accuracy voltage measurement device is shown.
From a semiconductor test equipment (hereinafter referred to as “tester”) 60 to the liquid crystal driver 51, gradation digital data equaling to the number of all output terminals set beforehand, for every gradation level, is sequentially input to the base power supply voltage input terminals 6-1˜6-x. In the base voltage generation circuit 8, base voltages are generated. The digital data of every gradation level are DA converted (base voltages are selected corresponding to the gradation level data) by the built-in DAC circuit 2-1˜2-m in the device. And, through the output amplifiers, as gradation output voltages, analog voltages are output from the output terminals 3-1˜3-m.
The analog voltages output from the liquid crystal driver 51 are input into the tester channels 11-1˜11-m being input terminals of the tester 60. Using the built-in voltmeter of high accuracy 62 in the tester 60, the outputs are tested one by one till the m-th output sequentially. The voltage values for every gradation level are analog tested, and the test results are saved each time in the built-in memory 63 in the tester 60.
The operation is repeated for the n gradations, and finally the data for all outputs, all gradations are saved in the memory 63. As a result, m×n voltage value data are saved. All the voltage values saved in the memory 63 are computed using the built-in computational device 64 in the tester 60. In this way, every gradation voltage value (hereinafter described as “the maximum value difference and minimum value difference of the gradation output voltages for ideal gradation output voltage values”) for every output, and the uniformity of gradation voltage values between every output (hereinafter described as “inter-terminal fluctuation”), can be found by calculation.
As for the general judgment references for gradation voltage values, taking all output terminals 3-1˜3-m as objects, for ideal gradation output voltage values of every gradation level, they are the three values of the maximum deviation and minimum deviation of the gradation output voltages, and the inter-terminal fluctuation. Here, for the ideal gradation output voltage values, the judgment values for the maximum deviation and the minimum deviation of the gradation output voltages is, e.g., ±30 [mV], and for the inter-terminal fluctuation, a reference value of about 35 [mV]. As it is necessary to pick out the defective ones by these reference values, very high measurement accuracy is needed.
Up to here, the existing test method of gradation output voltages is described. However, besides the test for gradation output voltages, the test for liquid crystal driver also carries out tests for the items of input leak, Gamma correction resistance value, function operations, high-rate clock operation, current consumption, etc. However, in the test execution time for all these test items, 70-80% is taken up by the test for gradation output voltages.
In the judgment module mounted in the tester, besides the high-accuracy voltage measurement device, there is a comparison judgment circuit (hereinafter “comparator”).
In FIG. 2, a schematic block diagram of the circuit of a conventional semiconductor test device made of a liquid crystal driver and a comparator is shown. Here, the gradation output voltages output by the liquid crystal driver 51 are judged by the built-in comparator 12-1˜12-m in the tester 70.
Similar to the conventional tester 60 by a high-accuracy voltage measurement device, a number of the pre-set gradation digital data equaling to the total number of output terminals is sequentially input for every gradation level by the tester 70 to the liquid crystal driver 51. The gradation digital data of every level are converted (the base voltage corresponding to the gradation level data is selected) by the built-in DAC circuit 2-1˜2-m in the device. Through an output amplifier, analog voltages are output from the output terminals 3-1˜3-m as output voltages of the gradation levels. These analog voltages are input into the comparator 12-1˜12-m of the tester 70, to carry out judgment by the comparison judgment voltage level values corresponding to the number of sets of predetermined gradation digital data equaling to the total number of output terminals.
In FIG. 3, the correlation diagram of the set voltage of the judgment base level and the gray scale output voltages at the time of comparator judgment is shown.
Comparison judgment voltage levels show, corresponding to the gradation output voltage value of every level, the two voltage values determining its upper limit, and lower limit. In this figure, the voltage region in between the upper limit and the lower limit is judged to be PASS, and the region above the upper limit, and the region below the lower limit are shown to be judged FAIL. However, according to the test contents (the setting of expectation values), the setting of the opposite is also possible.
A liquid crystal driver that can test using test devices of comparators has been disclosed in Japanese Patent Application Laid-open 2000-165244. FIG. 4 shows a block diagram of the circuit showing this liquid crystal driver.
The liquid crystal driver LSI 81 shown in FIG. 4 provides the gradation data to the bus line 83 of the DAC through the decoder 82. Corresponding to every gradation data, one of the gradation voltage selection switch 85, which decides the output voltage from the base power supply terminal 6-1˜6-10 and the resistance divider circuit 13, is selected. And the respective gradation voltages are output through the output amplifier 84 from each output terminals 3-1˜3-m.
Its structure is such that in between every base power supply terminals 6-1˜6-10, relays 85, 86 are connected in a series circuit, and to the connection point of the relays 85, 86, the mid-point of the resistance divider circuit 13 is connected.
To the base power supply terminal at one end, a power supply voltage (5V) is applied, and the base power supply terminal at the other end is applied with the ground voltage (0V). Now, when testing the upper part, relay 85 is turned OFF, and relay 86 is turned ON. As a result, at both ends of the upper part of the resistance divider circuit 13, a voltage of 5V is applied.
Next, the specified gradation data is applied to the decoder 82 to make it output an analog voltage. At this time, the potential difference between every output voltage is 5V/4=1.25, a very big value. That is, the first gradation voltage is 5 V, the second gradation voltage is 3.75 V, the third gradation voltage is 2.5 V, the fourth gradation voltage is 1.25 V, the fifth gradation voltage is 0 V. Thus, for example, if the comparator has an accuracy of less than 0.5V, the voltage of every gradation can be recognized, and digital judgment using a comparator is possible. When testing the lower part, the first relay 85 is turned ON, and the relay 86 is turned OFF.
The problems of conventional semiconductor test equipment are summarized as follows.    (1) The Problem of Test Using High Accuracy Voltage Measurement Device
The semiconductor circuit test using a high-accuracy voltage measurement device is shown in FIG. 1. In the tests of liquid crystal drivers, because of the movement towards multi-output and multi-gradation, as the output judgment of the devices has to be processed sequentially, the increase in the amount of data to be read and the increase in data processing time escalate. The test time increases tremendously in the gradation output voltage test. Moreover, as it is necessary to measure more accurately the gradation output voltage values, an expensive tester mounted with a plurality of high-accuracy voltage measurement device is required.
Furthermore, test accuracy becomes more difficult to ensure, because of the advance of multi-gradation. That is, because of the advance of multi-gradation, the potential differences between the outputs of every gradation level are greatly decreased. This is decided by, the aforementioned, the Gamma correction resistor circuit integrated inside the device as a base voltage generation circuit, through the resistance division ratio against the voltage applied from the base power voltage input terminals. The more minutely divided this division ratio is, the more advanced the multi-gradation is. That is, by simple calculation, the output gradation potential difference between neighboring gradations of a 6 [V] driven liquid crystal driver of 64 gradations is 93.75 [mV] (6000 [mV]/64 gradation). By contrast, that of a 6 [V] driven liquid crystal driver of 256 gradations is 23.44 [mV] (6000 [mV]/256 gradation). As a result, when the output potential differences between neighboring gradation for every gradation level is smaller than the output voltage deviation (inter-terminal fluctuation), for the foregoing values, because of the improper reading in of the data, corruption by one gradation, etc., may occur. Even in tests by high-accuracy voltage measurement device, it is difficult to ensure that the test accuracy that the output voltage of every gradation level corresponds to the image digital data. Moreover, setting the judgment values critically for the test for inter-terminal fluctuation is difficult for the specification of the liquid crystal drivers, even for inter-terminal fluctuation of 35 [mV] of the foregoing judgment reference example.    (2) The Problem of the Test Using a Comparator
The merit of the semiconductor circuit test using the comparator shown in FIG. 2 is that all outputs of the device can be judged altogether in parallel, greatly reducing the test time. As comparators are relatively inexpensive, a plurality of comparators upto the corresponding number of LSI outputs are mounted in a tester.
However, as shown in FIG. 3, the accuracy of a comparator cannot differentiate a gradation output voltage level difference less than 100 [mV]. When a plurality of gradation levels exist in between the minimum width of the comparison judgment voltage levels (base voltage ±100 [mV]), the gradation level being the test object becomes unclear. In addition, the accurate values of the maximum deviation and minimum deviation of every gradation output voltage and the inter-terminal fluctuation between every output cannot be found. Therefore, differentiation of gradation output voltage level differences less than about 0.1 [V] is not possible, and it is difficult to ensure the test accuracy of functional operation precision of the liquid crystal drivers. Hence, in general, comparator judgment is not used in the gradation output voltage test for liquid crystal drivers, and is used now in test items not related to the accuracy of gradation output voltages of liquid crystal drivers.
For instance, when a liquid crystal driver outputs at 3.0 [V] at a specific gradation level, by the accuracy of the comparator, the upper limit value of the comparator judgment of this gradation level has a maximum value of 3.1 [V]. And the judgment lower limit value has a minimum value of 2.9 [V]. That is, the potential difference of these two judgment levels is 0.2 [V]. For the 6 [V] driven liquid crystal driver of 256 gradations shown in the foregoing example, as the gradation output potential difference per gradation is 23.44 [mV], in between these two judgment levels, 8 to 9 gradations of the gradation output levels are included. Hence, tests narrowing down the object to an individual gradation output voltage corresponding to the input data of each gradation level cannot be carried out.
Furthermore, a block diagram of the input setting of conventional base power supply voltage is shown in FIG. 5.
For instance, when a 10 [V] driven liquid crystal driver 1 of 256 gradations has 6 base power supply input terminals, from the high voltage of the gradation output voltages, V1=10 [V], V2=8[V], V3=6 [V], V4=4 [V], V5=2 [V], V6=0 [V]are applied. The gradation output voltage level in between the respective base power supply input terminals, a potential difference of 2 [V], is divided by the division ratio according to the Gamma correction resistance characteristics into the output voltage for each gradation level. Accordingly, in between each of the base power supply input terminals, from the potential difference of 2 [V], if the number of gradation output voltage levels is 51 gradations (dividing the 256 gradations into 5 for each of the base power supply input terminals), the gradation output voltage potential difference for each gradation is about 40 [mV]. When carrying out comparator judgment as shown in FIG. 3, for the comparator accuracy, differentiation of gradation output voltage level difference less than 100 [mV] is not possible. In the minimum width (base voltage ±100 [mV]) of the comparison judgment levels, about 5 gradation level exist (calculated from the judgment width of the comparator 200 [mV]/the potential difference per gradation about 40 [mV]), and the gradation levels being test objects become unclear.
A liquid crystal driver that can differentiate gradation output voltage level difference using a comparator has been disclosed in Japanese Patent Application Laid-open 2000-165244, but for this liquid crystal driver, it is necessary to put on a new relay circuit, which would make a chip area increase. In the design of the device, by equipping the ON resistance of the switch=relay circuit of 1 KΩ in between each of the base power supply terminals, the chip area increases by about 7%. To lower the ON resistance of the switch, it is necessary to further increase the relay circuit area, and as a result, the chip area is further increased.
Moreover, to the resistance division circuit 13 of the gradation output levels being the test objects, the voltage applied should be increased two times theoretically by shorting one side of the relay circuit, however, actually, it could not be increased by upto two times due to the ON resistance of the relay circuit. The reason for this is that as the resistance division circuit (Gamma correction resistance) moves towards low resistance, the ON resistance of the relay circuit increases relatively. Consequently, the voltage drop due to the ON resistance increases, and the effect of voltage increase is not produced to the extent expected.
Furthermore, in the trend towards diversified device functions, when tests are carried out with existing testers (fewer tester channels), the channels to control the relays become necessary, and testing plan becomes complicated.
USPTO Backgrounds
USPTO Backgrounds