In recent years, attention has focused on a technique for making a thin film transistor (TFT) with the use of a semiconductor thin film (having a thickness of approximately several to several hundreds of nanometers) formed over a substrate having an insulating surface. The thin film transistors are widely applied to electronic devices such as ICs and electro-optical devices, and their rapid development as switching elements for image display devices has been particularly desired.
In order to obtain high-definition image display, a high-definition photolithography technique for arranging switching elements of an image display device with high area efficiency has been required. A large one-shot exposure apparatus, a stepper exposure apparatus, or the like is used in order to form switching elements over a large-area substrate with high precision.
Although a large one-shot exposure apparatus can expose a large area to light at a time, there is a problem in that variation in illuminance intensity or degree of parallelization is large. Accordingly, a stepper exposure apparatus which uses an optical system has often been used.
A region which is exposed to light at a time with the stepper exposure apparatus is limited. When light exposure is performed on an area which is larger than that region, several shots of light exposure are needed.
As an alternative to a silicon wafer which is manufactured by thinly slicing an ingot of a single-crystal semiconductor, a semiconductor substrate which is referred to as a silicon-on-insulator (SOI substrate) in which a thin single-crystal semiconductor layer is provided over an insulating layer has been developed. SOI substrate has been spread as substrates in manufacturing microprocessors or the like. The SOI substrate has been attracting attention because, when transistors that constitute part of an integrated circuit are formed using an SOI substrate, it is possible to reduce parasitic capacitance between drains of the transistors and the substrate, make the integrated circuit have higher performance, and achieve low power consumption.
As a method for manufacturing SOI substrates, a hydrogen ion implantation separation method using an ion implantation apparatus is known (for example, see Patent Document 1: U.S. Pat. No. 6,372,609). The hydrogen ion implantation separation method using an ion implantation apparatus is a method by which hydrogen ions are implanted into a silicon wafer to form a microbubble layer at a predetermined depth from the surface, and a thin silicon layer (SOI layer) is bonded to another silicon wafer using the microbubble layer as a cleavage plane. In addition to heat treatment for separating an SOI layer, it is necessary to perform heat treatment in an oxidizing atmosphere to form an oxide film on the SOI layer, remove the oxide film, and perform heat treatment at 1000° C. to 1300° C. in a reducing atmosphere to increase bonding strength.
On the other hand, attempts have been made to form an SOI layer on an insulating substrate such as glass. As an example of SOI substrates in which SOI layers are formed over glass substrates, an SOI substrate in which a thin single-crystal silicon layer is formed over a glass substrate having a coating film by a hydrogen ion implantation separation method using an ion implantation apparatus is known (see Patent Document 2: U.S. Pat. No. 7,119,365). In this case also, a thin silicon layer (SOI layer) is formed over the glass substrate in such a way that a microbubble layer is formed at a predetermined depth from the surface by implantation of hydrogen ions to a single-crystal silicon wafer, the glass substrate and the single-crystalline silicon wafer are bonded, and the silicon wafer is separated using the microbubble layer as a cleavage plane.
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