The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials, design, and fabrication tools have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of these advances, fabrication methods, tools, and materials have struggled to realize the desire for smaller feature sizes.
Lithography is a mechanism by which a pattern is projected onto a substrate, such as a semiconductor wafer, having a photosensitive layer formed thereon. The pattern is typically induced by passing radiation through a patterned photomask. Important to today's lithography processes are their depth of focus (DOF) or the tolerance of placement of the image plane. One manner of improving the DOF in lithography processes, as well as other process window metrics, is providing reticle enhancement technique (RET) solutions such as scattering bars to the photomask. The resolution improvement provided by RET features such as scattering bars however raise other challenges. For example, as photosensitive materials become more sensitive to meet current radiation sources, this sensitivity can raises concerns of the unwanted printing of RET features onto the target substrate.
USPTO Backgrounds
USPTO Backgrounds