1. Field of the Invention
This invention relates to memory subsystems and, more particularly, to power distribution to the memory modules of a memory subsystem.
2. Description of the Related Art
Computer systems are typically available in a range of configurations which may afford a user varying degrees of reliability, availability and serviceability (RAS). In some systems, reliability may be paramount. Thus, a reliable system may include features designed to prevent failures. In other systems, availability may be important and so systems may be designed to have significant fail-over capabilities in the event of a failure. Either of these types of systems may include built-in redundancies of critical components. In addition, systems may be designed with serviceability in mind. Such systems may allow fast system recovery during system failures due to component accessibility. In critical systems, such as high-end servers and some multiple processor and distributed processing systems, a combination of the above features may produce the desired RAS level.
In many computer systems, one or more processors may be connected to a memory subsystem which includes memory modules. Each memory module may be mated to a system board via an edge connector and socket arrangement. The socket may be located on a memory subsystem circuit board and each memory module may have an edge connector which may be inserted into the socket, for example.
The memory module circuit board typically has contact pads or “fingers” arranged on both sides and along one edge of the circuit board. This edge of the circuit board is inserted into a socket having spring-loaded contacts for mating with the fingers. The socket arrangement allows the memory modules to be removed and replaced by a user. In many systems, the memory module connectors are mounted on a motherboard or system board such that the memory modules connect to a memory bus or interconnect one row after another or in a daisy chain. In some cases a computer system may be provided with a given number of memory modules and a user may add modules to expand the system memory capacity.
From a reliability standpoint, each component and signal connection may contribute to a given circuit board's or a given system's overall mean time between failure (MTBF). For a memory subsystem, damaged contact pads or a failing component on a single memory module which can cause a short circuit between power and ground could disable every other memory module receiving power from the same power rail. For example, a filter capacitor coupled between Vdd and Ground becomes shorted, one transistor of a complimentary metal oxide semiconductor (CMOS) inverter becomes “stuck on” or a damaged memory module socket shorts Vdd to Ground. Any of these failure modes could conceivably take down the entire memory subsystem. Thus, it may be desirable to protect a memory system against these types of failures, particularly in systems expected to have high RAS levels.
USPTO Backgrounds
USPTO Backgrounds