A power amplification circuit in a wireless system is typically a large signal device. In wireless local area network (WLAN) systems, the power amplifier (PA) circuit may be required to transmit output signals at power levels ranging from −50 dBm to +30 dBm, for example. In such WLAN systems, which may, for example, utilize a wide range of modulation types from binary phase shift keying (BPSK) to 512 level quadrature amplitude modulation (512-QAM), output power levels may vary widely such that the ratio of the peak power level to the average power level may be large, for example, 10 dBm to 15 dBm.
The power output of a PA may be affected by the impedance of the antenna. The output impedance of a properly designed PA is matched to the impedance of the antenna. If for some reason the antenna impedance changes, this may cause a reflection in the signal at the antenna back to the PA, which is known as voltage standing wave ratio (VSWR). For example, if a hand or other object is placed on an antenna, the impedance of the antenna may change. With a VSWR of greater than 1, the output power of the PA may vary as gain control circuitry attempts to compensate for the output voltage swing due the reflected signal. One current approach utilized in an attempt to reduce VSWR is with external discrete directional couplers.
Limitations in the performance of PA circuitry may be exacerbated when the PA is integrated in a single integrated circuit (IC) device with other radio frequency (RF) transmitter circuitry [such as digital to analog converters (DAC), low pass filters (LPF), mixers, and RF programmable gain amplifiers (RFPGA)]. Whereas the pressing need to increase the integration of functions performed within a single IC, and attendant increase in the number of semiconductor devices, may push semiconductor fabrication technologies toward increasingly shrinking semiconductor device geometries, these very semiconductor fabrication technologies may impose limitations on the performance of the integrated PA circuitry. For example, utilizing a 65 nm CMOS process may restrict the range of input power levels for which the PA provides linear output power level amplification. Requirements for AM-AM and/or AM-PM distortion levels as set forth in a WLAN standard, such as IEEE 802.11, may preclude transmitting output signals at high output power levels for PA circuitry that is fabricated utilizing a 65 nm CMOS process, for example.
Wireless systems are typically designed to function at a specific frequency, 900 MHz or 1.8 GHz, for example, and utilizing a defined standard such as GSM, WCDMA, EDGE, for example. Thus, wireless systems have to be designed for a specific application with device performance optimized for that application.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.
USPTO Backgrounds
USPTO Backgrounds