Example embodiments of the inventive concepts described herein generally relate to semiconductor packages and manufacturing methods of the same and, more particularly, to a semiconductor package capable of mounting a plurality of integrated circuits and manufacturing methods of the same.
In recent years, wafer-level chip size packages have become a popular packaging technology. In a wafer-level chip size package, integrated circuit chips (IC chips) are mounted on a substrate in a so-called ‘flip chip’ manner. A semiconductor package allows a plurality of IC chips to be stacked sequentially.
USPTO Backgrounds
USPTO Backgrounds