1. Field of the Invention
The present invention relates to package fabrication technology. More particularly, the present invention provides a new packaging form of a semiconductor diode, which is fabricated by using low-temperature cofired ceramic (LTCC) technology. The resultant chip form semiconductor diode has improved hermeticity and reliability, and the fabrication method is also simple and low-cost.
2. Description of the Related Arts
Regular semiconductor diode packaging methods can be classified into three types; namely, the metal or ceramic container package, the plastic molding package, and the spin-coating glass package. According to the metal or ceramic container package, a diode die is placed into the cavity of a metal or ceramic container; then, the two opposite electrode surfaces of the diode die are connected to conductive elements by soft soldering or hard brazing. This method does not achieve a compact assembly, and the resulting package is poor in hermeticity and reliability. According to the plastic molding package, the diode die is connected to the conductive elements first, and then encapsulated with plastics. A compact packaging assembly can be obtained by the plastic molding package; however, because the inner conductor cannot be processed at high temperatures, ceramics cannot be used to replace the sealing plastics to guarantee a better hermeticity. Thus, the hermeticity problem is still a concern. As to the spin-coating glass package, refractory metals such as molybdenum or tungsten are used for connection with the diode die. The diode die is connected to the electrode element made of molybdenum or tungsten to form a sub-assembly, and the sub-assembly is spin-coated by a slurry of glass powder and then fired at a high temperature to form a good hermitic packaging. However, the use of molybdenum or tungsten increases the processing complexity, and the resulting diode component, moreover, is of bead form, limiting its usage.
The trend for increasing the volume efficiency, and reliability of electrical components requires the development of the chip form semiconductor diode. The core technology for fabricating chip form diodes includes:
(1) the thin-film method--coating, photo-lithography, and etching; and PA1 (2) the thick-film method--tape casting, screen-printing, and laminating. PA1 (a) providing a ceramic green tape having a through hole for positioning a diode die; PA1 (b) positioning a diode die in the through hole; PA1 (c) sandwiching the diode die between two ceramic green tapes having printed conductive layers facing the electrode surfaces of the diode die; PA1 (d) laminating the ceramic tapes into a compact such that the conductive layers connect to the electrodes of the diode die; PA1 (e) firing the laminated parts to form a monolithic sintered body; and PA1 (f) forming end terminals, and solder-plating the end terminals to finish a ceramic chip of the semiconductor diode.
The thin-film process is largely used for the fabrication of diode dies, while the thick-film process is largely for packaging. The present invention relates to a packaging process using low-temperature cofired technology. This technology can effectively reduce the processing complexity and at the same time increase the hermeticity and reliability.
A process for manufacturing resin-molded semiconductor devices is described in U.S. Pat. No. 4,540,603. In the process, a semiconductor pellet is brazed to a pair of axial leads to form a sub-assembly, and then an epoxy resin is deposited on the sub-assembly and hardened. This packaging using plastic molding cannot resist high temperatures and its hermeticity is not sufficient. A similar process for fabricating semiconductor devices is described in U.S. Pat. No. 4,972,139, in which aluminum metalization layers are applied to the top and bottom of a semiconductor die and are used for a high temperature brazing of contact members to the die.
U.S. Pat. No. 5,166,098 discloses a method of manufacturing an encapsulated semiconductor device with a can type housing. In this method, a semiconductor die is inserted into a prefabricated plastic can, followed by filling the can with curable plastic compounds.
U.S. Pat. No. 5,019,535 discloses a die attachment method using nonconductive adhesive for use in high density interconnected assemblies. The method affixes integrated circuit chips to a substrate by using a thermoplastic polyimide adhesive instead of conductive materials. The method is very effective for reducing package sizes, but it restricts the flexibility of the circuit design.
U.S. Pat. No. 5,337,216 discloses a small outline integrated circuit package, in which epoxy resins are used for postmolding. This package has a low profile that allows it to be used in thin profile, high density electronic assemblies. However, the hermeticity and reliability are still not comparable to that of ceramic packaging.
U.S. Pat. No. 5,550,086 describes a fabrication method of ceramic chip form semiconductor diode. According to the method, a diode die is attached to a plate-like ceramic body element having external electrodes, and encapsulated by applying glass paste thereto. After the external electrodes and the electrodes of the diode die are connected by a conductive layer, they are covered by an over glaze to finish the package.
USPTO Backgrounds
USPTO Backgrounds