As the miniaturization of semiconductor elements and routing has progressed down to the 20 nm technology node, a new metallization layer known as metal—0 has been introduced in contact with the substrate itself in order to provide for extra routing resources. The metal—0 layer has been introduced to electrically connect portions of the substrate with other nearby portions of the substrate without routing the connection into an overlying first metal layer (separated from the substrate by an inter-layer dielectric layer). As such, the connections that used to be located in the original metal—1 layer in the previous technology nodes (such as the 28 nm technology node) were migrated into the new metal—0 layer, the connections that were originally located in the old metal—2 layer were migrated into the new metal—1 layer, the connections that used to be located in the old metal—3 layer were migrated into the new metal—2 layer, and so forth.
However, with the introduction of the metal—0 layer also came a corresponding parasitic resistance in the metal—0 layer. This parasitic resistance caused an IR drop and a larger signal RC delay because the current became crowded with the reduction in size (from, e.g., 28 nm technology node to a 20 nm technology node). Such degradations in the resistance, the IR drop, and the RC delay, cause a degradation in the performance of the device to the point where these limitations are becoming the leading limitations in the minimum operating voltage of devices.
Additionally, the introduction of metal—0 also has implications in the new metal—2 layers. Because at least two vias may be needed to connect the metal—2 layer to the metal—1 layer in order to address yield and signal concerns, a single track (or line) in the metal—2 layer may need to be expanded over its desired connection in order to accommodate the two vias. Such an expansion over the via connections is known as a “hammer head” and can actually double the width of the track over the desired connection. Such doubling of the width can cause either large design issues (as other tracks in the metal—2 layer are designed to conform to the suddenly enlarged width) or else the complete elimination of an entire track in the metal—2 layer in order to make room for the “hammer head.”
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale.
USPTO Backgrounds
USPTO Backgrounds