1. Field of the Invention
This invention relates to digital-to-analog converters (DAC's), and more particularly to monolithic digital to analog convertors utilizing an R-2R ladder-type circuit.
2. Description of the Prior Art
Prior circuits have employed various correction schemes to increase the conversion accuracy of digital to analog converters. Among the methods used in these prior art DAC's are correcting the more significant bits of the DAC by the use of zener diodes, metal links, thin film links and thin film resistor laser trimming. These methods have several drawbacks, including high cost, the requirement for a large amount of chip area in monolithic applications and the inability to readjust the device so as to change the amount of correction applied.
Another type of correction scheme is employed in U.S. Pat. No. 4,070,665 to Glennon, et al. In this system a main DAC, a read only memory device (PROM) and an additional correction DAC are used to provide a high accuracy conversion. The conversion error corresponding to each main DAC digital input code is initially determined. The correction DAC is utilized to generate a correction signal which compensates for the error of the main DAC. The proper digital input to the correction DAC for each main DAC input code is determined and stored in the memory device. The main DAC input serves as the address for the memory. The correction signal is added to the output of the main DAC so as to result in a more accurate analog system output. In order to insure that all error correction is in one direction, a constant offset signal generator is employed. The output of the constant offset device is added to the outputs of the main and correction DAC's, and the PROM is programmed so that the correction DAC compensates for the offset signal as well as the main DAC error.
The system described in the Glennon patent utilizes a four bit correction DAC to provide an analog correction signal. If more accurate correction is desired, a correction DAC having increased resolution is required. Generally, this increased resolution is obtained by the use of high accuracy components, which increases manufacturing difficulty and therefore cost of the device.
It is an object of the present invention to provide a high accuracy digital-to-analog converter which utilizes a correction DAC and a programmable memory to provide an input to the correction DAC. It is another object of the invention to provide a high accuracy digital-to-analog converter without the need for high accuracy components in the correction DAC. It is a further object of the invention to provide a high accuracy monolithic digital-to-analog converter while utilizing a minimum amount of chip space. Yet another object of the invention is to eliminate the need for a correction DAC which is required to subtract as well as add current, or for a constant offset current generator.
USPTO Backgrounds
USPTO Backgrounds