1. Field of the Invention
This invention relates to the fabrication of silicon integrated circuits that use silicon oxide to provide dielectric isolation between components.
2. Description of the Prior Art
It is well known to use silicon oxide to provide dielectric isolation in silicon integrated circuits. In such a process a trench is often formed by selective etching in the silicon chip and this trench is later filled by thermal oxidation selectivity of the trenched portion. Use is often made of the fact that thermally grown silicon oxide has approximately twice the volume of the silicon consumed to fill the trench so that a substantially planar final surface can be achieved. Such a planar surface is desirable to facilitate the interconnection of components of the integrated circuit by overlay metallizations.
In a process of this kind, because the thermally grown oxide grows both from the bottom and the vertical walls of the trench, stresses tend to develop in the thermally grown trench filler, particularly if the trench is not completely smooth, as is usually the case, and if the material in which the trench is formed involves epitaxially grown material. Such stresses have undesirable effects, such as inducing damage in the surrounding silicon, militating against a high packing density of components in the chip. This problem seems to be particularly acute when the thermal oxidation is done at relatively low temperature (e.g., 760-900 degrees C.) as is sometimes desirable for other reasons, because the viscosity of the growing oxide is considerably higher at such temperatures and stress-induced damage in the silicon is more likely to occur.
USPTO Backgrounds
USPTO Backgrounds