This invention relates to a semiconductor device and a refresh method of refreshing the semiconductor device.
As described in Japanese Laid-Open Patent Publication No. 2000-187995 (Patent Document 1), in a semiconductor device has been usually adopted a method of remedying or repairing defective memory cells, if any, by replacing the defective memory cells with spare memory cells and by improving the yield of the semiconductor devices.
In Patent Document 1, description is also made about a technique of remedying or repairing the semiconductor device by preparing a plurality of normal blocks including normal memory cells and a spare block including a plurality of spare memory cells and by substituting the spare block in response to an external address signal. Further, in Patent Document 1, repairing by substituting the spare block is performed by detecting whether the semiconductor device is in a normal mode or in a refresh mode, and by selecting a gate with reference to a result of spare judgment on detection of the refresh mode.
On the other hand, Japanese Laid-Open Patent Publication NO. 2000-294748 (Patent Document 2) discloses a technique of preparing a plurality of memory cell arrays and a redundant cell array in each cell array block and sharing the redundant cell array by a plurality of the memory cell arrays. Description is also made in Patent Document 2 about drawbacks of this technique. Further, Patent Document 2 proposes a so-called block redundancy method of preparing a redundant cell array in each of cell array blocks and a semiconductor device which is capable of repairing defects without impairing its rapid access function.
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