1. Field of the Invention
The invention relates to the field of defining and generating digital waveforms such as used as the local oscillator input of a down converter where the signals are based on a reference signal, more particularly where the digital waveforms are not an integer submultiple of the frequency of the reference signal.
2. Prior Art
It is often necessary to generate a digital waveform which is synchronized with a higher frequency reference signal such as the reference signal from a crystal oscillator. Such digital waveforms have many applications and, for instance, are used as local oscillators of receivers having down converters, one of which will be described in conjunction with FIG. 1.
Ideally the digital waveform or local oscillator signal is some integer, submultiple of the reference signal permitting a divider, or the like, to be used to directly convert the reference signal to the frequency of the local oscillator. However, in many cases, other constraints in system design prevent the selection of a reference frequency which readily divides into the desired clocking frequency.
The present invention resulted from an application where a 10 MHz reference signal is divided to provide a local oscillator frequency of approximately 131 kHz (more precisely 10 MHz÷76) for a down converter. It was found necessary to add a second channel which would receive at approximately 115 kHz (more precisely 10 MHz÷86 6/7), while retaining the 10 MHz crystal oscillator of the prior system. The second local oscillator signal needed for the 115 kHz channel is not an integer submultiple of the 10 MHz reference frequency.
The prior art provides numerous solutions to this problem including, perhaps the most costly, adding a second crystal oscillator. Other prior art solutions include the use of a phase lock loop or the generation of a digital waveform based on two submultiples of the reference signal (e.g., 86 and 87). In this latter solution, the digital waveform is generated using, for instance, 87 counts of the 10 MHz clock for some predetermined number of cycles followed by a cycle of 86 counts to make up for the fact that the frequency of the desired digital waveform is larger than 10 MHz/87.
The specific prior art down converter in which the present invention is used is described in the Detailed Description of the Invention as it may be helpful to the understanding of the present invention.
A method for providing a periodic digital waveform of a predetermined frequency based on a higher frequency reference signal is disclosed. The digital waveform has a plurality of segments which are periodically repeated, each segment having a predetermined relationship to the higher frequency signal. A plurality of digital waveforms are first generated, each of which has its segments in a different order. Each of these digital waveforms still have the same predetermined frequency even though the order of the segments is different. Each of these digital waveforms is examined against some selected criteria such as in the case of the oscillator in a down converter, the performance of the receiver. From the examination of the plurality of digital waveforms, a particular digital waveform is selected and used again by way of example, as the local oscillator signal in the down converter.
USPTO Backgrounds
USPTO Backgrounds