Solid state storage devices use analog memory cells to store data. Each memory cell stores a storage value, such as an electrical voltage. The storage value represents the information stored in the memory cell. Many solid state storage devices distinguish between different binary values that a memory cell may store based on a read voltage level of the memory cell. The range of possible storage values for each memory cell is typically divided into threshold regions, with each region separated by a read threshold voltage and corresponding to one or more data bit values. Ideally, all of the memory cells in a given solid state storage device have identical read threshold voltages for the logical bit values stored. In practice, however, the read threshold voltages differ across the cells in probability distributions along the read threshold voltage axis (e.g., “read threshold voltage distributions”) that are similar to a Gaussian distribution.
In addition, solid state storage devices can shift over time. For example, memory cell leakage, memory cell damage and other disturbances to memory cells can alter the read voltage levels of the memory cells. Thus, the read threshold voltages can shift over time. The rate of leakage and other disturbances can also increase with age as memory cells are used over time. If the read voltage level of a memory cell shifts past a read threshold voltage, a data error occurs, as the value of the data read from the memory cell is different than the value of the data that was written to the memory cell.
A number of techniques have been proposed or suggested for adapting to the changes in the read threshold voltages to maintain a desired performance level. Existing adaptive tracking algorithms are designed to track variations in the solid state storage channel and consequently, to help maintain a set of updated channel parameters. The updated channel parameters are used, for example, to adjust read threshold voltages.
United States Published Patent Application No. 2013/0343131, filed Jun. 26, 2012, entitled “Optimization of Read Thresholds for Non-Volatile Memory,” incorporated by reference herein, discloses techniques for adapting read threshold voltages. While such existing adaptive tracking algorithms have helped to improve the performance of solid state storage devices, they suffer from one or more limitations, which if overcome, could further improve the reliability and performance of solid state storage devices. For example, the techniques described in United States Published Patent Application No. 2013/0343131 assume that the gaps between default read threshold voltages of solid state storage devices are known. Generally, gaps are constant values that ensure a common scale between various collected statistics. While some solid state storage vendors provide information on the gaps, others vendors do not provide such information.
Thus, a need exists for improved techniques for adapting read threshold voltages that estimate the gap between default read threshold voltages of solid state storage devices and thereby improve the decoding performance. A further need exists for techniques that separately characterize each side of a given distribution about the mean of the distribution to thereby compute read threshold voltages with improved robustness.
USPTO Backgrounds
USPTO Backgrounds