The exemplary embodiments relate to a manufacturing process for replacement metal gate CMOS devices and, more particularly, relate to a simpler manufacturing process to obtain quarter-gap pFET.
Today's integrated circuits include a vast number of devices. Smaller devices and shrinking ground rules are the key to enhance performance and to reduce cost. As FET (Field Effect Transistor) devices are being scaled down, the technology becomes more complex, and changes in device structures and new fabrication methods are needed to maintain the expected performance enhancement from one generation of devices to the next.
Device performance may be enhanced by the use of metal gates and high-k dielectric materials.
USPTO Backgrounds
USPTO Backgrounds