The present invention relates generally to semiconductor devices, and more particularly, to a semiconductor package and a stacked semiconductor package having the same.
Today's semiconductor chips are capable of both storing and processing massive amounts of data. These semiconductor chips are packaged in semiconductor packages.
Chip scale packages have been considered to have the potential to have a size that is no greater than about 100% to 105% of the size of a semiconductor chip. Further, stacked semiconductor packages, in which two or more chip scale packages are stacked, can be utilized to increase data storage capacity and data processing speed.
In a conventional stacked semiconductor package, the respective semiconductor packages, which are stacked upon one another, and a substrate on which the semiconductor packages are placed are electrically connected using conductive wires.
However, when the semiconductor packages and the substrate are electrically connected using conductive wires there is a difference between the length of the conductive wires used to connect the lowermost semiconductor package to the substrate and the length of the conductive wires used to connect an upper semiconductor package, which is placed over the lower semiconductor package, to the substrate. As a consequence, problems arise when attempting to process data at a high speed.
USPTO Backgrounds
USPTO Backgrounds