1. Field of Invention
The present invention relates generally to apparatus for processing semiconductor wafers. More specifically, the invention relates to a semiconductor substrate support assembly.
2. Description of the Background Art
Integrated circuits have evolved into complex devices that include millions of transistors, capacitors and resistors on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit density. As the demand for integrated circuits continue to rise, chip manufactures have demanded semiconductor process tooling having increased wafer throughput and greater product yield. To meet this increase in throughput, tooling is being developed to process wider diameter wafers, for example, wafers having diameters of 300 millimeters (mm).
Processing chambers generally capable of processing 200 mm wafers typically comprise a semiconductor wafer support assembly further comprising a puck such as and electrostatic chuck, temperature controlling base having a cooling plate and heating electrodes, and a support pedestal. Other various components, such as gas lines, electrical lines, backside gas conduits, and the like are also disposed in the semiconductor wafer support assembly. During the manufacture of such semiconductor wafer support assembly, numerous o-rings are required between the components in the support assembly to sustain a vacuum tight seal between an internal chamber environment and the external environment. The o-rings also prevent the hostile plasma or chemical environment present in the chamber during processing from penetrating and attacking wafer support components. For example, the 200 mm deposition chamber such as the model HDPCVD ULTIMA(trademark) of Applied Materials, Inc. utilizes 16 o-rings to assemble and mount a semiconductor wafer support assembly. Another problem that has been observed when utilizing o-rings is that they are subject to deterioration and outgassing after repeated processing cycles in the chamber. Constant thermal and/or chamber pressure cycling erodes the elastic properties of the o-rings. Minute particles from the o-ring eventually begin to flake off. Such flaking generates contaminants that are undesirable, since they can drift onto a wafer during processing. These contaminants can subsequently create shorts or voids in the devices formed in the processed wafer thereby degrading the quality of the wafer.
Therefore, there is a need in the art for a deposition process chamber that minimizes the risk of particle contamination in the chamber from the o-rings. Furthermore, there is a need for maintaining the integrity of the vacuum seal, while protecting the internal components of the semiconductor wafer support assembly from the hostile chamber environment. Moreover, it would be desirable for such a system to minimize the number of components, maximize seal life and provide ease of serviceability.
The disadvantages associated with the prior art are overcome by the present invention of semiconductor substrate processing system. The semiconductor processing system generally comprises a chamber body that has a plurality of sidewalls. At least one support arm extends radially inwards coupled to a semiconductor wafer processing substrate support assembly. The substrate support assembly is centrally disposed on the support arm, and comprises a substrate support platform having a centrally disposed recess, a base disposed above the centrally disposed recess, a plate disposed above the base, and a substrate support disposed above the plate.
The substrate support assembly further comprises a plurality of o-rings having a plurality of lobes, wherein a first lobed o-ring of the plurality of lobed o-rings is disposed between the support platform and the base, a second lobed o-ring is disposed between the base and the plate, and a third lobed o-ring is disposed between the plate and the substrate support. Moreover, the lobed o-rings are utilized in the support assembly for reducing the number of o-rings required in the support assembly.
USPTO Backgrounds
USPTO Backgrounds