A semiconductor device manufactured by installing a semiconductor die onto an interposer and stacking the interposer on another semiconductor die or substrate may be referred to herein as a 2.5D package. What is referred to herein as a 3D package may be obtained by directly stacking one semiconductor die onto another semiconductor die or substrate without utilizing an interposer.
The interposer of the 2.5D package may include a plurality of through silicon vias so as to permit an electrical signal to flow between an upper semiconductor die and a lower semiconductor die or substrate. Accordingly, the through silicon vias as well as circuit patterns may be formed in the interposer in a semiconductor device, which may increase manufacturing cost and may result in a thicker device.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.
USPTO Backgrounds
USPTO Backgrounds