This invention relates to a bonded structure that provides bonding between multiple substrates through formation of a metal semiconductor alloy and methods of manufacturing the same.
Bonding of multiple substrates is required to enable three-dimensional integration of chips. Bonding of two substrates can be achieved by adhesion of two dielectric materials as in an oxide-to-oxide bonding that fuses silicon dioxide materials from two substrates after bonding, by adhesion between two metallic material as in a copper-to-copper bonding that employs direct contact between opposing copper pads and a subsequent grain growth across the original interface between the opposing copper pads, or by a method employing a combination of the two adhesion mechanisms.
Through-substrate-via (TSV) structures, formed after multiple substrates are bonded and optionally thinned, provide electrical connection across the multiple substrates in a bonded structure. A TSV structure may include a conductive material such as copper, which diffuses rapidly in the plane of the bonding interface between substrates because microscopic irregularities and cavities are present at the interface. Diffusion of the conductive material from a TSV structure into the surrounding substrate region can cause electrical shorts and reliability problems in the bonded structure.
An interfacial layer, such as silicon nitride, can be employed to reduce subsequent diffusion of conductive material from TSV structures. In this case, the diffusion resistant materials retard lateral diffusion of the conductive material from the TSV structures along the interface between two bonded substrates, thereby preventing electrical shorts.
Diffusion of materials across the original interface provides the adhesion strength between two bonded substrates in prior art bonding methods. Because the diffusion of materials across a bonding interface is thermally driven and the temperature of the anneal is limited for semiconductor substrates to a temperature range that does not cause decomposition of back-end-of-line (BEOL) dielectric materials, the bonding strength provided by conventional methods of substrate bonding can be limited.
USPTO Backgrounds
USPTO Backgrounds