1. Field of the Invention
The present invention relates generally to the field of microprocessors, and, more particularly, it concerns a method and apparatus for performing segment limit checks during a memory access.
2. Description of Related Art
Modem computer systems use different techniques for managing the memory of the computer system. Memory is typically used for storing information or for storing program instructions for the computer system. Memory management allows the operating system of the computer system to create simplified environments for running programs.
A common technique used in modem computer systems for memory management is segmentation. Segmentation divides the memory of the computer system into sections called segments. Each segment is an independent, protected region of memory that has common attributes. For example, all of the code for an application program may be contained in a single segment, or an operating system table may reside in a single segment. Further, each application program can be allocated several segments for its use.
Segment registers are used to identify the memory region addressable for a particular segment. Each segment register indexes an associated segment descriptor, when the microprocessor is in protected mode. Each segment descriptor includes a base address, a segment limit, and protection attributes for a particular segment. The base address is the beginning address of the segment, and the segment limit defines the valid range of memory addresses available. When a segment register is initialized an associated segment descriptor is retrieved. Segment descriptors are generally stored in a segment descriptor table located in main memory.
Segmentation can be used to control memory access by implementing segment based memory addressing. When memory is accessed, an address is formed by adding an offset to the base address of the segment. This provides the beginning address for the memory access. For more information on segmentation see Pentium.RTM. Processor Family Developers Manual, Intel Corporation, 1995, Chapter 3.
Memory access cannot be outside the defined valid region of the segment being accessed. For example, assume for an expand-up segment that the base is 000F0000.sub.16 and the segment limit is 00001000.sub.16. All memory references for this segment must be between 000F0000.sub.16 and 000F1000.sub.16. Any memory references for this segment outside of this range are outside of the segment. Limit checks are used with every memory access to prevent references to memory beyond the segment limit of the specified segment. When a memory access is beyond the segment limit, a limit check triggers an exception. An exception causes the operating system to disallow the memory access. Limit checks are needed to ensure that memory in another segment is not overwritten.
In prior computer systems, determination of a segment limit violation for an expand-up segment required several steps. The segment limit check guarantees that the entire memory access is within the segment limit. To ensure this protection, some prior art techniques first required that the beginning address of memory access be compared with the segment limit. If the beginning address was greater than the limit, then a limit violation occurred. The prior art technique also required the calculation of the end address of the memory access. The end address of the memory access was calculated by adding the length of memory access to the beginning address. Next, the end address was compared to the segment limit. If the end address was greater than the segment limit, then a limit violation occurred. Thus, a separate addition step was necessary before a compare operation could take place. For more information on limit checking see Pentium.RTM. Processor Family Developers Manual, Intel Corporation, 1995, Chapter 12.
The multiple steps required by the prior art limit checking technique take time. As microprocessors develop, clock frequencies continue to increase, making it difficult to perform these steps in a single clock cycle. Rather, the prior art method of limit checking may require two clock cycles or more depending on the clock frequency. Memory accesses occur very frequently. Thus, the prior art method of limit checking will be detrimental to the performance of higher frequency microprocessors.
The present invention is directed to overcoming, or at least reducing the effects of the problem set forth above.
USPTO Backgrounds
USPTO Backgrounds