The present invention is related to a voltage-controlled oscillator circuit (VCO) for constituting a phase-locked loop (PLL) circuit. This phase-locked loop circuit produces a clock signal in synchronism with input data and/or an input clock in an optical transmitter module and an optical receiver module used in an optical communication.
A voltage-controlled oscillator circuit (VCO) for constituting a phase-locked loop (PLL) circuit which produces a clock signal in synchronism with input data and also an input clock, corresponds to such an oscillator. An oscillating frequency of this VCO circuit is varied in response to a control voltage. In general, there are a multivibrator type VCO and a ring oscillator type VCO with respect to a VCO used in an integrated circuit (IC). In the case of a ring oscillator type VCO, since this VCO may be constructed only of transistors and resistors, this ring oscillator type VCO may be manufactured in the form of an IC. Also, in principle, since 4-phase clocks are outputted in which a phase of an oscillator signal is shifted by xcfx80/2, xcfx80, and 3xcfx80/2, this ring oscillator type VCO owns the following merit. That is, when a frequency comparator is arranged by employing such a ring oscillator type VCO, a necessary xcfx80/2-delay signal can be produced without employment of an additional circuit.
In FIG. 1, a typical ring oscillator circuit is indicated. An oscillation is initiated by such a way that outputs derived from two-staged differential amplifiers are supplied as inputs to the corresponding differential amplifiers in a positive feedback manner, so that V0, V90, V180, and V270 corresponding to 4-phase clock signals can be obtained. As an item indicative of a characteristic of a VCO circuit, there are an oscillating frequency and a frequency modulation sensitivity. This frequency modulation sensitivity represents a degree of changes in the oscillating frequencies with respect to a control voltage. In this type of system, an oscillating frequency is determined by a transition (cut-off) frequency xe2x80x9cfTxe2x80x9d of a transistor. In general, a transition frequency of a bipolar type transistor is expressed by the below-mentioned equation (1), assuming now that a collector-to-base capacitance is xe2x80x9cCbcxe2x80x9d, a base-to-emitter capacitance is xe2x80x9cCbexe2x80x9d, and a mutual conductance is xe2x80x9cgmxe2x80x9d:
fT=gm/2xcfx80(Cbc+Cbe)xe2x80x83xe2x80x83(1)
where the values of xe2x80x9cCbcxe2x80x9d and xe2x80x9cCbexe2x80x9d depend upon a device fabrication technology. Also, assuming now that an elementary electric charge is xe2x80x9cqxe2x80x9d, a collector current is xe2x80x9cIcxe2x80x9d, the Boltzmann constant is xe2x80x9ckxe2x80x9d, and an absolute temperature is xe2x80x9cTxe2x80x9d, the mutual conductance xe2x80x9cgmxe2x80x9d may be expressed by the following equation (2), and is directly proportional to the collector current:
gm=(qxc2x7Ic)/(kxc2x7T)xe2x80x83xe2x80x83(2)
As a consequence, the oscillating frequency can be controlled by controlling the voltage xe2x80x9cVcontxe2x80x9d shown in FIG. 1, and by varying an amount of a current xe2x80x9cI1xe2x80x9d flowing through the differential amplifier, and this ring oscillator may function as a voltage-controlled oscillator. As apparent from the above-described equation (1), the frequency modulation sensitivity indicative of a change in the oscillating frequencies with respect to a change in the control voltages will depend upon both Cbc and Cbe. Both Cbc and Cbe may be controlled in such a manner that while a plurality of transistors are employed, base, collector, and emitter terminals thereof are connected in parallel to each other. For example, when xe2x80x9cnxe2x80x9d pieces of transistors are connected in parallel to each other, a collector-to-base capacitance becomes xe2x80x9cnCbcxe2x80x9d and a base-to-emitter capacitance becomes xe2x80x9cnCbexe2x80x9d. In this ring oscillator circuit, the parallel element number of the transistors which constitute the differential transistor pairs is varied so as to change these capacitances xe2x80x9cCbcxe2x80x9d and xe2x80x9cCbexe2x80x9d, so that the frequency modulation sensitivity can be set. Such a system for controlling the oscillating frequency by controlling the currents of the differential transistor pairs is known from, for example, JP-A-9-326676.
In the related ring oscillator type VCO circuit, both Cbc and Cbe are changed by the parallel element number of the transistors of the differential pairs, so that the frequency modulation sensitivity is set. However, these capacitance values Cbc and Cbe are also related to the transition frequency, and therefore may give an adverse influence to the oscillating frequency. To set the oscillating frequency, this oscillating frequency is controllable by the collector current value in accordance with the above-explained equations (1) and (2). In a practical transistor, a range capable of satisfying the above-explained equation (2) is finite, and therefore, a setting width of an oscillating frequency is also finite. As previously explained, in this system, it is practically difficult to set both the oscillating frequency and the frequency modulation sensitivity to desirable values, respectively. In other words, in this VCO circuit, as to the oscillating frequency, the transition frequency xe2x80x9cfTxe2x80x9d of the transistor is varied by controlling the values of the currents flowing through the differential transistor pairs so as to control the oscillating frequency, whereas as to the frequency modulation sensitivity, this frequency modulation sensitivity is set to a desirable value by varying the capacitance values. However, since the capacitance values are also related to the oscillating frequency, it is practically difficult to design both the oscillating frequency and the frequency modulation sensitivity to the desirable values at the same time.
Also, in the related system, since the frequency of the oscillator is controlled by the values of the currents flowing through the differential pairs, the output amplitude of the oscillator becomes Rxc3x97(I1+xcex94I), assuming now that the resistance values R1 to R4 connected to the differential transistor pairs are equal to xe2x80x9cRxe2x80x9d, and a change amount of currents is xe2x80x9cxcex94Ixe2x80x9d. As a result, there are such problems that the output amplitude of the oscillator owns the current depending characteristic, and therefore, the phase detection sensitivity at the phase comparator may change due to this behavior.
Furthermore, in the circuit system shown in FIG. 1, when noise is mixed with the current source control voltage Vcont, both the oscillating frequency and the output amplitude are changed, the jitter contained in the output signal are readily increased.
The present invention has been made to solve the above-described problems, and therefore, has an object to provide a frequency response controllable amplifier, a voltage-controlled oscillator (VCO), and a phase-locked loop (PLL) circuit, capable of increasing a flexibility of design, while enlarging a range for setting an oscillating frequency, and also a range for setting a frequency modulation sensitivity.
Another object of the present invention is to provide a frequency response controllable amplifier, a voltage-controlled oscillator (VCO), and a phase-locked loop (PLL) circuit, capable of increasing a flexibility of design, while enlarging ranges for setting both an oscillating frequency and a frequency modulation sensitivity, and moreover an oscillating frequency depending characteristic of an output amplitude can be canceled.
Another object of the present invention is to provide a frequency response controllable amplifier, a voltage-controlled oscillator (VCO), and a phase-locked loop (PLL) circuit, capable of increasing a flexibility of design, while enlarging ranges for setting both an oscillating frequency and a frequency modulation sensitivity, and moreover suppressing an increase of jitter caused by common mode noise.
A further object of the present invention is to provide a digital optical receiver module and a digital optical transmitter module, in which a phase-locked loop (PLL) circuit can be applied to an optical communication.
To achieve the above-explained objects, a voltage-controlled oscillator, according to an aspect of the present invention, is featured by such a ring oscillator type voltage-controlled oscillator wherein: the ring oscillator type voltage-controlled oscillator is arranged in such a manner that both an oscillating frequency and a frequency modulation sensitivity can be separately set to desirable values.
Also, a voltage-controlled oscillator, according to another aspect of the present invention, is featured by such a ring oscillator type voltage-controlled oscillator comprising: at least two sets of a high speed differential amplifier and a low speed differential amplifier, the frequency response speeds of which are different from each other; and an adder for calculating a summation of outputs of the at least two high speed and low speed differential amplifiers; wherein: a selection ratio of the at least two high speed/low speed differential amplifiers is varied in a linear manner, so that both an oscillating frequency and a frequency modulation sensitivity can be separately set to desirable values, respectively.
Also, in the above-described voltage-controlled oscillator of the present invention, this voltage-controlled oscillator is featured by arranging that while a summation between a current flowing through the high speed differential amplifier and a current flowing through the low speed differential amplifier is made constant, an oscillating frequency depending characteristic of an output amplitude is canceled.
Also, in the above-described voltage-controlled oscillator of the present invention, this voltage-controlled oscillator is featured by arranging that control signals are supplied in a differential structure to at least the two high speed/low speed differential amplifiers.
Also, a voltage-controlled oscillator, according to another aspect of the present invention, is featured by comprising: a first frequency response controllable amplifier equipped with a current source for producing a DC current; a DC current distributer for distributing the DC current of the current source into two DC currents in a ratio depending upon an input control signal; a high speed current distributor in response to an input switching signal; a low speed current distributor in response to the input switching signal; an adder for adding the output from the high speed current distributor to the output from the low speed current distributor; and an output buffer for an output signal from the adder; and a second frequency response controllable amplifier equipped with a current source for producing a DC current; a DC current distributer for distributing the DC current of the current source into two DC currents in a ratio depending upon an input control signal; a high speed current distributor in response to an input switching signal; a low speed current distributor in response to the input switching signal; an adder for adding the output from the high speed current distributor to the output from the low speed current distributor; and an output buffer for output voltage of the adder; wherein: a positive feedback circuit is arranged by using the output signal derived from the first frequency response variable amplifier as an input signal for the second frequency response variable amplifier; and also by using the output signal derived from the second frequency response variable amplifier as an input signal for the first frequency response amplifier.
Also, a phase-looked loop circuit, according to another aspect of the present invention, is featured by comprising the above-explained voltage-controlled oscillator.
Further, a phase-locked loop circuit, according to another aspect of the present invention, is featured by comprising: the above-explained voltage-controlled oscillator; a phase/frequency comparator for comparing phases/frequencies as to the oscillating frequencies outputted from this voltage-controlled oscillator and the entered data; and a loop filter for rejecting high frequency noise from this phase/frequency comparator; wherein a control voltage signal from the loop filter is entered into the above-explained voltage-controlled oscillator.
Also, a digital optical receiver module, according to another aspect of the present invention, is featured by such an optical receiver module arranged by a photodetector for receiving a transmitted optical signal, an amplifier for amplifying the optical signal received by photodetector, and the above-explained phase-locked loop circuit; and in which the optical receiver module is comprised of: a timing extraction circuit for producing and outputting a clock signal in synchronism with a data signal derived from the amplifier; and a decision and regeneration circuit for deciding and regenerating the data signal derived from the amplifier by employing a clock signal derived from the timing extraction circuit.
Moreover, a frequency response controllable amplifier, according to another aspect of the present invention, is featured by comprising: a current source for producing a DC current; a DC current distributer for distributing the DC current of the current source into two DC currents in a ratio depending upon an input control signal; a high speed current distributor in response to an input switching signal; a low speed current distributor in response to the input switching signal; an adder for adding the output from the high speed current distributor to the output from the low speed current distributor; and an output buffer for an output signal from the adder.
As previously described, the ring oscillator type voltage controller, according to the present invention, is arranged in""such a manner that the parallel connection number of the transistors is changed; two sets of the high speed/low speed differential amplifiers having the different frequency response speeds from each other are prepared; the output signals derived from the high speed/low speed differential amplifiers are summed; and then the selection ratio of these high speed/low speed differential amplifiers is varied in a linear manner. As a result, both the oscillating frequency and the frequency modulation sensitivity can be separately set. In other words, both the oscillating frequency of the high speed differential amplifier and the oscillating frequency of the low speed differential amplifier are set in such a manner that the desirable oscillating frequency variable ranges can be obtained. The selection ratio of these high speed/low speed differential amplifiers is voltage-controlled so as to set the control sensitivities thereof. As a consequence, the desirable frequency modulation sensitivities can be obtained.
Also, when the high speed differential stage and the low speed differential stage are selectively controlled, since the VCO circuit is arranged in such a manner that the summation of the current flowing through the high speed differential stage and the current flowing through the low speed differential stage is made constant, the oscillating frequency depending characteristic of the output amplitude can be canceled.
Also, since the voltage used to control the oscillating frequency may be applied by the differential arrangement, increasing of the jitter caused by the common mode noise can be suppressed.
USPTO Backgrounds
USPTO Backgrounds