Electronic systems that utilize printed circuit boards require some or all of the electrical signals to enter, traverse and exit the printed circuit board. In systems that use high frequency electrical signals, the site of connections between the printed circuit board and electronic components, as well as connections to other printed circuit boards, is often the site of signal attenuation, reflection, interference and skew, all of which contribute to signal degradation that may harm the performance of the system. System architects can maintain signal integrity by designing connectors that lower inductance, reduce parasitic capacitance, minimize signal distortion and reflections, eliminate skew, and match impedance, wherever possible. In addition, system architects can improve signal integrity by designing connectors that optimize electromechanical contact force and contact wipe.
Vias, or plated through holes, in printed circuit boards can cause significant harm to signal integrity, yet vias are commonly used to make electromechanical connections to printed circuit boards. FIG. 1 illustrates a prior-art connector system in which the connector 101 attaches to a printed circuit board 102, where the printed circuit board contains multiple layers 103. A conductive pin 104 is inserted into a plated through hole 105 (which consists of a hole 106, drilled through the printed circuit board, and an annular pad 107—both of which are plated with a conductive material). In this illustration, the plated through holes create anchor points for the connector, and the plated through hole makes an electrical connection between the conductive pin 104 and a trace 108 that may be located one or more layers within the printed circuit board.
Stair-step printed circuit board structures, examples of which appear in FIG. 1A, may limit or eliminate the need to use vias in order to make connections to traces that exist one or more layers below the surface of the printed circuit board 101a. Traces 102a below the surface of the printed circuit board are exposed by the stair-step structure in which layers of the printed circuit board above the trace are removed. In one stair-step implementation, 103a, the traces are exposed at edge of the printed circuit board. In another implementation, 104a, the traces are exposed away from the edge of the printed circuit board. Stair-step printed circuit board structure may require stair-step connectors by which electrical components can be connected to the stair-step printed circuit board.
USPTO Backgrounds
USPTO Backgrounds