1. Field of the Invention
This invention relates to Mask ROM memory devices and more particularly to the structure of such devices. 2. Description of Related Art
When the cell size of a Mask ROM is scaled down to smaller dimensions, conventional MOS switches suffer a number of problems, for example, the short channel effect, hot carriers, punch through, etc. These disadvantages constrain the application of MOS switches in further high density memory devices including Mask ROMS.
U.S. Pat. No. 4,219,836 of McElroy for "Contact Programmable Double Level Polysilicon MOS Read Only Memory" shows a method for manufacturing a ROM with use of FET transistors.
U.S. Pat. No. 3,717,852 of Abbas et al for "Electronically Rewritable Read-Only Memory Using Via Connections" show a diode matrix using voltage breakdown attributed to electromigration to write "0" bits in the rewritable ROM.
An additional reference is U.S. Pat. No. 4,951,103 of Esquivel et al for "Fast, Trench Isolated, Planar Flash EEPROMS with Silicided Bitlines".
USPTO Backgrounds
USPTO Backgrounds