The Open NAND Flash Interface (ONFI) protocol provides support for parallel access to multiple NAND dies (or “logical units” (LUNs)) on a single “target” or NAND multi-chip stack on a single shared ONFI channel. For example, as shown in FIG. 8, for a target ONFI device containing 4 NAND dies (LUNs 0-3), an erase, program, or read operation can be issued by the host controller and executed on three of the LUNs while a command is still in progress on the fourth of the LUNs. This offers overlapping array access (optimal utilization) of all four dies while host controller commands are arriving. Note, however, that only one of these commands at a time may be transmitting or receiving its data on the shared channel.
In a typical mass storage application, such as a solid state drive (SSD), a central host controller will receive commands on its Serial Advanced Technology Attachment (SATA) interface and translate them to be distributed and issued to multiple ONFI target NAND multi-chip stacks. In addition to dispatching host commands to the intended memory dies, the host controller can also perform memory management/storage optimization functions, which typically include a non-trivial amount of data moves/copies among the pool of NAND dies. Whether the host controller is dispatching a host command or a memory management/storage optimization command to each LUN, the command runs to completion on that LUN without being interrupted.
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