Integrated circuits are fabricated using photolithographic processes that use patterned reticles to define the structures formed in semiconductor substrates that comprise the integrated circuit. Fabrication of a single integrated circuit can require reticle sets containing significant numbers of expensive reticles so the industry has moved to multi-level reticles (MLR) to save mask costs. The expanding number of different types of structures for reticle enhancement technology has prevented significant cost savings from MLR being realized. Accordingly, there exists a need in the art to reduce the associated costs of reticles.
USPTO Backgrounds
USPTO Backgrounds