1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same.
2. Description of the Related Art
The conventional semiconductor device disclosed in Jpn. Pat. Appln. KOKAI Publication No. 2003-298005 includes solder balls as connecting terminals outside a semiconductor chip having a predetermined size. Therefore, this semiconductor device has a structure in which the semiconductor chip has a plurality of connecting pads on its upper surface, and is formed on the upper surface of a base plate. An insulating layer is formed on the upper surface of the base plate around the semiconductor chip. An upper insulating film is formed on the upper surfaces of the semiconductor chip and insulating layer, upper interconnections are formed on the upper surface of the upper insulating film so as to be connected to the connecting pads of the semiconductor chip, portions except for connecting pad portions of the upper interconnections are covered with an uppermost insulating film. Solder balls are respectively formed on the connecting pad portions of the upper interconnections.
The above conventional semiconductor device is, for example, fabricated as follows. To increase the productivity, a plurality of semiconductor chips are separately arranged on the upper surface of a base plate having an area capable of forming a plurality of completed semiconductor devices. An insulating layer is formed on the upper surface of the base plate around semiconductor chips. An upper insulating film is formed on the upper surfaces of the semiconductor chips and insulating layer. Upper interconnections are formed on the upper surface of the upper insulating film so as to be electrically connected to connecting pads of the semiconductor chips. Portions except for connecting pad portions of the upper interconnections are covered with an uppermost insulating film. Solder balls are formed on the connecting pad portions of the upper interconnections. The base plate, insulating layer, upper insulating film, and uppermost insulating film are cut between the semiconductor chips, thereby obtaining a plurality of conventional semiconductor devices described above.
In this conventional semiconductor device fabrication method, the insulating layer is formed on the upper surface of the base plate around semiconductor chips by thermally hardening and shrinking an insulating layer formation layer made of an unhardened resin such as an epoxy-based resin or polyimide-based resin. Therefore, the base plate largely warps, and this interferes with transfer to the subsequent steps and decreases the processing accuracy in the subsequent steps. For example, when the dimensions of a base plate having an area capable of forming a plurality of completed semiconductor devices are 300 mm×250 mm, the warping amount of the base plate is as large as 13 to 15 mm.
USPTO Backgrounds
USPTO Backgrounds