1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an LCD device having a uniform cell gap.
2. Discussion of the Related Art
Generally, the LCD device includes a first substrate, a second substrate and a spacer therebetween for maintaining a gap between the first and second substrate. The spacer is classified into a ball spacer and a column spacer according to its shape or forming process.
Recently, the column spacer, which is formed at a desired position and in a desired shape, is widely used. Generally, the column spacer is formed on the second substrate being fabricated by a less-numbered mask process than the first substrate. The column spacer is classified into a gap column spacer contacting the first substrate including a thin film transistor and a push column spacer that is spaced apart from the first substrate by a pre-determined distance.
FIG. 1 is a plane view of the related art LCD device.
As shown in FIG. 1, the related art LCD device includes a first substrate 10, which includes a thin film transistor (TFT) Tr, a pixel electrode 57 and a common electrode, a second substrate including a gap column spacer and a liquid crystal layer between the first substrate 10 and the second substrate.
On the first substrate 10, a plurality of gate lines 17 and a plurality of data lines 18 are formed. The gate lines 17 and the data lines 18 cross each other to define a plurality of pixel regions.
In each pixel region, the TFT Tr, which is connected to the gate line 17 and the data line 18, is formed at a crossing portion of the gate line 17 and the data line 18.
A first passivation layer, which covers the TFT Tr, is formed over the first substrate 10, and a second passivation layer is formed on the first passivation layer.
A portion of the second passivation layer, which corresponds to the TFT Tr, is removed to form a hole “hl” exposing a portion of the first passivation layer.
The common electrode is formed on the second passivation layer and over an entire surface of the first substrate 10. A third passivation layer is formed on the common electrode.
The pixel electrode 57, which is formed of a transparent conductive material and contacts a drain electrode 36 of the TFT Tr, is formed on the third passivation layer. The pixel electrode 57 includes at least one opening corresponding to the common electrode.
On the second substrate, which faces the first substrate 10, a black matrix, which corresponds to the TFT Tr and boundaries of the pixel region, and a color filter layer are formed. The color filter layer includes red, green and blue color filter patterns. An overcoat layer, which has a flat top surface, is formed on the color filter layer, and the gap column spacer, which has a column shape, is formed on the overcoat layer.
In this instance, the gap column spacer is positioned at a first portion 11 corresponding to the second passivation layer between adjacent holes “hl” such that an entire bottom surface of the gap column spacer contacts the third passivation layer on the second passivation layer.
A number and density of the gap column spacer are determined based on a contact density of the gap column spacer to the first substrate 10.
FIGS. 2A to 2C are cross-sectional views taken along the line II-II in FIG. 1. FIG. 2A shows a desired alignment state between the first and second substrates, and FIGS. 2B and 2C show a misalignment state between the first and second substrates.
As shown in FIGS. 2A to 2C, the TFT Tr is formed on the first substrate 10. The TFT Tr includes a semiconductor layer 13 including a first region 13a and second regions 13b at both sides of the first region 13a, a gate insulating layer 16, a gate electrode 21, an interlayer insulating layer 23, which includes semiconductor contact holes exposing the second regions 13b, a source electrode 33 and a drain electrode 36. The source and drain electrodes 33 and 36 contact the second regions 13b of the semiconductor layer 13 through the semiconductor contact holes.
The first passivation layer 41, which includes a drain contact hole “ch” exposing the drain electrode 36, is formed on the TFT Tr. In addition, the second passivation layer 51, which includes the hole “hl” corresponding to the TFT Tr, is formed on the first passivation layer 41.
The common electrode is formed on the second passivation layer 51, and the third passivation layer 55, which exposes the drain contact hole “ch”, is formed on the common electrode. The pixel electrode, which contacts the drain electrode 36 through the drain contact hole “ch”, is formed on the third passivation layer 55.
On the second substrate 20, the black matrix 61, the color filter layer 63, the overcoat layer 65 and the gap column spacer 75 are formed.
The first and second substrates 10 and 20 are attached such that the gap column spacer 75 contacts an element, e.g., the third passivation layer 55, on the first substrate 10.
Referring to FIG. 2A, an entire bottom surface of the gap column spacer 75 contacts the third passivation layer 55 on the second passivation layer 51 such that a cell gap of a liquid crystal panel is uniformly maintained.
Further, referring to FIG. 2B, when misalignment occurs between the first and second substrates 10 and 20, a portion of the bottom surface of the gap column spacer contacts the third passivation layer 55 and the other portion of the bottom surface of the gap column spacer is positioned at the hole “hl”. Namely, the contact area between the gap column spacer and the third passivation layer 55 is reduced.
In addition, referring to FIG. 2C, when much misalignment occurs, an entire bottom surface of the gap column spacer 75 contacts the third passivation layer 55 in the hole “hl” such that the cell gap of the liquid crystal panel is reduced.
Accordingly, the cell gap of the liquid crystal panel is not uniform such that a desired amount of the liquid crystal layer is not filled. As a result, image quality is degraded. In addition, when a portion of the LCD device is touched or pushed, brightness non-uniformity is generated in the portion.
In a high pixel-per-inch model LCD device, a width of the second passivation layer 51 between adjacent holes “hl” is decreased. Accordingly, with a small outer impact or a little misalignment, the gap column spacer 75 is shifted to be inserted into the hole “hl” such that there is a big problem in the cell gap.
USPTO Backgrounds
USPTO Backgrounds