The present invention relates to an external storage subsystem, and more particularly to a technology effective for an improvement of reliability of an external storage subsystem having a cache function.
For example, in a magnetic disk subsystem used as an external storage in a general purpose computer system, a well-known cache memory comprising a semi-conductor memory is interleaved at a portion of a disk controller to avoid as much as possible the reduction of a data transfer rate due to a mechanical factor such as a rotational delay time or a latency time in a magnetic disk drive.
A cache structure in such a disk controller is discussed in “A Multiport Page-Memory Architecture and A Multiport Disk-Cache System” New Generation Computing 2 (1984) 241-260 OHMSHA, LTD. and Springer-Verlag, in which it is proposed to improve an access performance to the cache by dividing into a plurality of memory banks. Further, a switching network called an interconnection network is proposed as a system for coupling the memory banks and a channel or a disk controller.
The conventional technology above intends to improve the cache performance by providing a plurality of memory banks and the switching network. As to a data bus structure in the disk controller, the switching network system called the interconnection network is proposed. However, the switching network system is imparted with a hardware restriction when a data bus configuration for exchanging data is to be constructed by connecting a plurality of memory banks and a plurality of channel units or a plurality of control units.
It does not refer to the multiplexity of the cache unit comprising the memory banks.
USPTO Backgrounds
USPTO Backgrounds