1. Field of the Invention
This invention relates generally to integrated circuits, and more particularly to a method of minimizing package-shift effects in integrated circuits containing bandgap references or other sensitive circuits by using a relatively thick metallic overcoat.
2. Description of the Prior Art
Bandgap references are used in a wide variety of integrated systems where accurate and precise voltage references with excellent line regulation and temperature stability performance are required. FIG. 1 shows a typical first-order Brokaw type bandgap circuit 100 realized in a BiCMOS technology. Bandgap references are critical in systems such as linear and switching regulators, analog-to-digital converters, digital-to-analog converters, and other like circuits where accuracy and precision as a whole are in great demand. Bandgap references play a pivotal role in determining the accuracy and precision of these systems. Circuit designers therefore employ different types of trimming techniques and algorithms to compensate for process variations, temperature, and complex second-order and third-order effects.
Bandgap references encapsulated in plastic packages however, exhibit a characteristic shift in voltage. Once the bandgap reference circuit is packaged in plastic, the bandgap reference output voltage differs from its original, non-packaged value. This package shift, unfortunately, is not completely consistent from unit to unit, even if the same encapsulant and packaging technique is used. This randomness is detrimental since designers cannot easily account for it in the design phase. In view of the foregoing, there is a need for a method to minimize package-shift effects in sensitive integrated circuits such as bandgap references that are packaged in plastic.
To meet the above and other objectives, the present invention provides a method of minimizing package-shift effects in integrated circuits such as bandgap reference circuits by using a relatively thick metallic overcoat. A thick layer of metal such as copper is deposited after the patterning of the protective overcoat layer, which itself consists of a rigid insulating material such as silicon nitride. The thickness of the conductive layer applied as part of this invention is substantially greater than the thickness of conventional aluminum metallization (1-2 xcexcm), but thinner than most existing conformal overcoats. The preferred implementation of the invention employs a layer of electrolytically deposited copper 15-20 xcexcm thick. Prior art uses various thick stress-absorbing insulating compounds called conformal overcoats, such as dropper applied polyimide and patterned polyimide films. These conformal overcoats are too thick to encapsulate in thin low profile packages. The relatively thick metallic coating proposed with this invention in addition to minimizing package-shift effects, is useful as a low-resistance routing layer. Further, low profile packaging can be implemented since the metallic overcoat is significantly thinner than prior-art solutions.
According to one embodiment, the invention comprises a method of minimizing package-shift effects in integrated circuits including the steps of:
(a) forming an integrated circuit (IC) die;
(b) depositing an insulating protective overcoat over the die and patterning via openings through this layer;
(c) depositing a thick metallic overcoat on the die;
(d) patterning the thick metallic overcoat, leaving a region of the metallic overcoat completely covering the bandgap reference and/or other sensitive analog circuitry; and
(e) encapsulating the IC die having the thick metallic overcoat deposited thereon with a plastic having filler particles loaded therein, as typically required for reliability issues, wherein the thick metallic overcoat provides a sandwich layer between the die and the filler-loaded plastic, and further wherein the thick metallic overcoat has a thickness having an order of magnitude about the same as the diameter of the filler particles.
According to another embodiment, the invention comprises a method of minimizing package-shift effects in integrated circuits including the steps of:
(a) forming an integrated circuit (IC) die;
(b) depositing an insulating protective overcoat over the die and patterning via openings through this layer;
(c) depositing a thick metallic overcoat on the die;
(d) patterning the thick metallic overcoat, leaving a region of metallic overcoat completely covering the bandgap reference and/or other sensitive analog circuitry; and
(e) encapsulating the IC die with plastic having filler particles loaded therein, wherein the thick metallic overcoat provides a sandwich layer between the die and the plastic such that a substantially uniform stress field is created between the plastic and the die.
According to still another embodiment, the invention comprises an integrated circuit device including:
an integrated circuit (IC) die having a thick metallic overcoat deposited thereon; and
a plastic package encapsulating the IC die having a thick metallic overcoat deposited thereon, wherein the thick metallic overcoat provides a sandwich layer between the die and the plastic package, and further wherein the plastic package comprises plastic having filler particles loaded therein such that the thick metallic overcoat has a thickness having an order of magnitude approximately the same diameter as the filler particles.
In one aspect of the invention, a bandgap reference circuit is fabricated using a thick metallic overcoat such as a simple copper overcoat as a stress-relief layer to minimize package-shift effects.
In another aspect of the invention, a bandgap reference circuit is fabricated using a thick metallic overcoat such as a simple copper overcoat to reduce electrical resistance.
In yet another aspect of the invention, a bandgap reference circuit is fabricated using a thick metallic overcoat such as a simple copper overcoat to provide an additional routing layer.
In still another aspect of the invention, a bandgap reference circuit is fabricated using a thick metallic overcoat, yet thin relative to previously known solutions, such as a simple copper overcoat to provide a low profile package.
USPTO Backgrounds
USPTO Backgrounds