In the field of electronics, various electronic design automation (EDA) tools are useful for automating the process by which integrated circuits, multi-chip modules, boards, etc., are designed and manufactured. In particular, electronic design automation tools are useful in the design of standard integrated circuits, custom integrated circuits (e.g., ASICs), and in the design of an integrated circuit that may be programmable. Integrated circuits that may be programmable by a customer to produce a custom design for that customer include programmable logic devices (PLDs). Programmable logic devices refer to any integrated circuit that may be programmed to perform a desired function and include programmable logic arrays (PLAs), programmable array logic (PAL), field programmable gate arrays (FPGA), and a wide variety of other logic and memory devices that may be programmed. Often, such PLDs are designed and programmed by an engineer using an electronic design automation tool that takes the form of a software package.
The use of such a software package in programming a PLD allows an engineer to plan a design for the PLD, iterate over modifications to the design, test the design, and finally program the design into the PLD. In the past, one engineer was more than capable of designing and implementing the logic for one PLD. In other words, the capacity and complexity of past PLDs was not so much as to overwhelm one engineer because the PLDs were smaller in terms of the total logic elements they contained. Currently, however, PLDs are becoming larger, more complex, and include such powerful processing capabilities that it is becoming increasingly difficult for only one engineer to plan and implement a design for one PLD. For example, it is becoming extremely difficult for one engineer to develop a design for a PLD that includes around 100,000 logic elements or more, especially in the face of a tight schedule driven by time-to-market requirements. The short development time of a PLD is one of the strong reasons for choosing such a programmable device over other types of integrated circuits.
More frequently, integrated circuit customers who buy and program PLDs are choosing smaller devices because design entry can be performed by a single engineer in a reasonable amount of time. In such cases, only one engineer is needed to design and program each PLD. This approach has its drawbacks because the power of more complex PLDs is not being utilized. For those customers who choose to design a large circuit using large, complex PLD, it is becoming increasingly difficult to coordinate the efforts of multiple engineers working on one design. The logistics of dividing up sections of the design to work on, keeping track of source files, and coordinating complied results amongst multiple engineers can be extremely difficult. Such coordination between multiple engineers working on a complex PLD design is becoming increasingly necessary as PLDs approach 100,000 logic elements and beyond. Without such coordination, the entire design process may take much longer than necessary and sub-optimal decisions may be made along the way.
Additionally, current compilers used with electronic design automation tools are often ill-suited for use by multiple engineers working on a complex PLD. When a minor change is made by one engineer to a small part of the overall PLD design, current compilers simply take all existing source files and recompile all of them in order to produce new compiled results. Once the complete design has been recompiled, it is then necessary to retest the complete design. Testing a complete design, including using a timing analyzer, simulation and creating vectors, can be very difficult and time consuming. During this time, the design must be frozen, thus preventing other engineers in the team from making and testing their own modifications.
Therefore, it would be desirable to have a technique for use with electronic design automation tools that allows multiple engineers to work in an efficient and coordinated fashion upon an electronic design for a complex integrated circuit, a multi-chip module, a circuit board, an ASIC, a PLD, etc. It would further be desirable for such an electronic design automation tool to have a compiler that was able to incrementally compile only those changes made by a single engineer so that the complete design would not have to be retested upon every compile.
USPTO Backgrounds
USPTO Backgrounds