1. Field of the Invention
The present invention relates to the field of color television circuits and, more particularly, chrominance decoding circuits. It applies more especially to the reception of televised broadcasts transmitted in accordance with the SECAM or PAL standards.
2. Description of the Prior Art
By way of reminder, FIG. 1 shows the structure of two successive lines transmitted in a colour television system of the SECAM type in the case where the transmitter supplies the image of a pattern of coloured vertical bars, the left hand bar being white and that of the right being black. For each color the superimmposition can be observed of the DC signal carrying luminance information and an AC signal whose modulation carries chrominance information.
In the PAL and SECAM systems, in order to have all the chrominance information relative to a displayed line, partial information present on two successive transmitted lines must be simultaneously available.
Thus, a chrominance decoding circuit is very schematically shown in FIG. 2. From input input signals I corresponding to the composite video signal, an integrated circuit supplies at its output channels A and B the chrominance signals R-Y and B-Y with the integrated circuit is necessarily associated a delay line 2, the value of the delay corresponding to the duration of the line, namely 64 microseconds in the case of transmission with 625 lines per image. Thus, it is possible to combine at a certain level of the integrated circuit 1 the signals relative to a transmitted line with those of the previously transmitted line, the result of this combination providing the chrominance signals R-Y and B-Y relative to a line to be displayed. Although they are not shown in the figure, certain discrete elements are generally associated with the integrated circuit 1, essentially high value capacitors useful for the filtering circuits, for example at the level of the bell filter of a SECAM decoder.
At the present time, the delay line 2 is generally an ultrasonic delay line.
One disadvantage of such a delay line is that it is a space wasting component. On the other hand, the provision of an ultrasonic delay line in a SECAM decoder is likely to introduce a certain diaphoty, that is to say a mixture of information contained in two successive lines. In the case of a PAL decoder, it is neccessary to associate with an ultrasonic delay line at least two adjusting means, which increases the manufacturing cost.
Thus, it has been suggested to replace the ultrasonic delay line by a digital delay line, the space consuming, diaphoty and adjusting disadvantageous then being overcome. However, given the difference of the physical phenomena brought into play in an ultrasonic delay line and in a digital delay line, these lines must not be placed in the same stage of the integrated decoding circuit 1; this, more especially because of the fact that an ultrasonic delay line acts on high frequency signals, that is to easy that the chrominance signals must be fed into this delay line before demodulation thereof, whereas a digital delay line acts preferably on lower frequency signals and so the demodulated chrominance signals are fed therein. Consequently in order to use a digital delay line rather than an ultrasonic delay line, it has been generally thought necessary to modify completely the architecture of the integrated circuit 1. Thus the cost of going over from an integrated circuit with ultrasonic delay lines to an integrated circuit with digital delay lines is increased since the whole of the integrated circuit must be redesigned.
At the present time, ultrasonic delay lines are still generally less expensive than digital delay lines. But, with the development of technologies this price ratio could in the near future be reversed. Thus, the present invention provides a matching means for using a conventional integrated circuit 1, normally associated with an ultrasonic delay line, for using this circuit with a digital delay line without any modification and, more especially, without it being necessary to provide additional access terminals, which, as is well known in the technique, from an important factor in increasing the cost of an integrated circuit. Thus, a television receiver constructor, normally using conventional integrated circuits associated with ultrasonic delay lines may, as soon as the ratio of the prices between the digital delay lines and ultrasonic delay lines is reversed, use in accordance with the invention the same conventional integrated circuit with a digital delay line. He may also, if he desires to construct high quality apparatus with digital delay line, even at the price of a cost increase, adapt a digital delay line without any difficulty by keeping the same conventional integrated circuit as the main element of the decoder.
USPTO Backgrounds
USPTO Backgrounds