1. Field of the Invention
The present invention relates to a solid-state image pickup device and a manufacturing method thereof, and an electronic apparatus.
2. Description of the Related Art
An electronic apparatus, such as a digital video camera or a digital still camera, contains a solid-state image pickup device. Examples of the solid-stage imaging device include a CMOS (Complementary Metal Oxide Semiconductor) type image sensor and a CCD (Charge Coupled Device) type image sensor.
In the solid-state image pickup device, an image-pickup region with pixels is formed on the surface of a semiconductor substrate. The pixels are provided with their respective photoelectric conversion parts. The photoelectric conversion part includes a photodiode or the like that receives light, which is incident via an external optical system, on its light reception surface and photoelectrically converts the light into a signal charge.
In the solid-state image pickup device, for example, an on-chip lens is arranged above the photoelectric conversion part. An arrangement of an inner-layer lens between the photoelectric conversion part and the on-chip lens has been proposed. The inner-layer lens is provided for efficiently irradiating the light incident via the on-chip lens to the photoelectric conversion part (see, for example, Japanese Published Patent Application No. 2008-112944).
The solid-state image pickup device is provided with a color filter for capturing a color image. The color filter includes, for example, filters of three primary colors in Bayer arrangement. Alternatively, in stead of a green filter in a Bayer arrangement, the arrangement of a transparent filter through which white light passes has been proposed to improve the sensitivity of the device. Also, the inclination of the Bayer arrangement at 45 degrees has been also proposed (see, for example, Japanese Published Patent Application Nos. 2000-156485, 2006-211630, and 2008-205940).
In the CMOS image sensor among the solid-state image pickup devices, a pixel is designed to include a plurality of transistors as well as a photoelectric conversion part. Such a plurality of transistors is configured as a pixel transistor group for reading a signal charge generated from the photoelectric conversion part and outputting it as an electric signal to a signal line. A plurality of lines is electrically connected to a plurality of transistors of the pixel transistor group. Thus, to reduce the size of each pixel, there is proposed a pixel configuration in which a plurality of photoelectric conversion parts shares the above pixel transistors. For example, a technology for allowing two or four photoelectric conversion parts to share one pixel transistor group (see, for example, Japanese Published Patent Application Nos. 2004-172950, 2006-157953, 2006-54276).
USPTO Backgrounds
USPTO Backgrounds