This disclosure relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a logic cell having a via contact and a method of manufacturing the logic cell.
A semiconductor device including an integrated circuit may include a logic gate and a circuit module. According to advancements in electronics technology, integrated circuit devices are rapidly being down-scaled. In down-scaled integrated circuit devices, distances between wirings and distances between contacts are rapidly reduced. To electrically separate the wirings and the contacts that are respectively connected to the wirings, not only the contacts are to be spatially separated but an insulation margin is to be secured by considering various errors that may occur in a photolithography process.
USPTO Backgrounds
USPTO Backgrounds