Single semiconductor devices are grouped into integrated circuits, which in turn are further densified into large scale integrated semiconductor systems. The trend in semiconductor integrated circuitry fabrication continues to involve a decrease in the size of individual structures. However, this has been accompanied by an increase in the complexity and number of such structures aggregated on a single semiconductor integrated chip.
One type of integrated circuitry comprises memory circuitry. This invention arose out of problems or challenges inherent in producing a particular type of memory circuitry, namely static random access memory (SRAMs). Such circuitry typically interconnects a gate of one transistor device to a diffusion area of another transistor device in a semiconductor substrate. One typical prior art method of accomplishing such fabrication and interconnection is described with reference to FIGS. 1-4.
FIG. 1 illustrates a semiconductor wafer fragment 10 comprised of a bulk substrate region 12 and field oxide regions 13. A gate oxide layer 14 overlies silicon substrate 12. A polysilicon layer 15 is provided over field oxide regions 13 and gate oxide layer 14. Such will be utilized for fabrication of a transistor gate line of associated SRAM circuitry. A layer 16 of photoresist is provided atop the substrate, and provided with an opening 17 therein.
Referring to FIG. 2, a contact opening 18 to bulk substrate 12 has been etched through polysilicon layer 15 and gate oxide layer 14. A desired diffusion region 20 is provided as shown. Then, the photoresist layer 16 of FIG. 1 is stripped.
Referring to FIG. 3, a subsequent polysilicon layer 22 is deposited over first polysilicon layer 15 and to within contact opening 18.
Referring to FIG. 4, layers 22 and 15 are patterned and etched to produce the illustrated transistor gate line 24 which extends over and ohmically connects with diffusion region 20.
It would be desirable to improve upon such a construction and method for producing such a construction. The artisan will also appreciate applicability of the invention to fabrication of constructions other than SRAM circuitry.
USPTO Backgrounds
USPTO Backgrounds