1. Field of the Invention
The present invention relates to a frame synchronization stabilizer for stably synchronizing frames of received data in digital data transmission.
2. Description of the Related Art
In data transmission such as digital data communication, a transmission side transmits a data stream with a frame synchronization pattern for synchronizing the data stream, frame by frame, to a reception side. The reception side identifies the synchronization pattern and thereby detects the end of each frame so as to correctly obtain the data. In synchronizing each frame, a frame synchronization stabilizer is used so as to stabilize the synchronization of frames against a disturbance which may takes place over a transmission line.
The frame synchronization stabilizer is provided with both a front stabilizing function for preventing it from determining an instantaneous pulse fluctuation due to a bit error over the transmission line as an out-of frame and a rear stabilizing function for preventing it from performing an incorrect synchronization due to an incorrect determination. Normally, the number of stages of a counter for a front synchronization stabilizer which accomplishes the front stabilizing function is larger than that for a rear synchronization stabilizer which accomplishes the rear stabilizing function.
Conventionally, the front synchronization stabilizer is provided with a match and mismatch detection circuit for outputting a match pulse or a mismatch pulse depending upon whether a data pattern in an area around the beginning of each received frame, in which area a synchronization pattern should be stored (hereinafter, this area is referred to as a synchronization pattern area), completely matches or mismatches a predetermined synchronization pattern. By the methods of counting the mismatch pulses or the match pulses which are outputted from the match and mismatch detection circuit frame by frame, the front synchronization stabilizer can be categorized as several types.
As one type of the front synchronization stabilizer, a reset counter type stabilizer is equipped with a mismatch counter for counting the number of mismatch pulses and for outputting a carry pulse when the counted value exceeds a particular value n (hereinafter, this value n is referred to as the counter size). The mismatch counter is reset by the match pulse and by the carry pulse. The carry pulse which is outputted from the mismatch counter is outputted as an out-of frame pulse for denoting that an out-of frame is detected. Thus, when n mismatch pulses are successively generated without generation of a match pulse, the out-of frame pulse is outputted.
While the frames are synchronized in the correct positions, if a bit error takes place due to a disturbance over the transmission line, the mismatch pulse is outputted and thereby the mismatch counter is incremented by one. However, while the frame synchronization is correctly made, since the match pulses are frequently outputted, the mismatch counter is reset before the counter value becomes the particular value n. Thus, the out-of frame pulse is not outputted. In other words, even if a disturbance takes place over the transmission line, the out-of frame hardly takes place.
On the other hand, when the frames are synchronized in the incorrect positions, since the mismatch pulse is outputted frame by frame, the mismatch counter continues counting until the counter value becomes the particular value n without being reset and thereby outputs the carry pulse which is the out-of frame pulse. Since the probability of matching data in the synchronization pattern area of each frame inputted with the particular synchronization pattern by chance and thereby for outputting the match pulse is very small, in most cases, the out-of frame pulse is outputted.
As another type of the front synchronization stabilizer, a racing counter type stabilizer is equipped with both a mismatch counter with size n for counting the number of mismatch pulses and for outputting a carry pulse when the count value becomes n and a match counter with size m for counting the number of match pulses and for outputting a carry pulse when the count value becomes a particular value m. The mismatch counter and the match counter are reset by the carry pulses being outputted therefrom. The carry pulse being outputted from the mismatch counter is outputted as an out-of frame pulse for denoting that an out-of frame is detected. As described above, the mismatch counter is reset when the number of mismatch pulses becomes the particular value m. Thus, in this type of the front synchronization stabilizer, when the density of the mismatch pulses in the successive frames including n mismatch pulses exceeds n/(n+m-1), the out-of frame pulse is outputted. In the reset counter type front synchronization stabilizer, the threshold value of determining the out-of frame just depends on the size of the mismatch counter. However, since the racing counter type front synchronization stabilizer uses the above mentioned two counters, the threshold value of determining the out-of frame can be variably set and thereby the degree of freedom of this type stabilizer is higher than that of the other.
In the front synchronization stabilizer, the following two functions are generally required.
USPTO Backgrounds
USPTO Backgrounds