This invention relates to a circuit for capturing the peak value of an electrical wave or pulse and more particularly, to a semiconductor integrated circuit for accomplishing this function.
There is a need for a relatively simple, high-speed circuit which captures and holds the peak value to which a wave or pulse rises. Electronic circuits for detecting peak values are previously known. An important aspect of most such circuits is their speed of response in terms of the duration of time in which the pulse or wave magnitude is observed and stored. In another aspect, the preciseness of such a circuit is a function of the speed with which the detection window is closed as the peak is passed.
For example, in the circuit disclosed in U.S. Pat. No. 3,413,491 to Reeves et al, a peak holder utilizes a pair of amplifiers and a blocking diode. This circuit, although functioning as designed, by virtue of its input configuration and feedback arrangement is not as fast as required by many present applications. In particular, the preamplifier requires a considerable slewing to accomplish both forward and reverse biasing of the blocking diode. The circuit therefore lacks the preciseness and speed of the peak catching function desired for many applications. Another type of peak detecting circuit is disclosed in U.S. Pat. No. 4,163,909 to J. D. Harr. In this patent, a circuit is disclosed for detecting the timing of the peak rather than its magnitude.
Accordingly, an object of this invention is a peak catcher circuit which captures the peak of a wave or pulse with preciseness and minimum overshoot. Precise turn-on is also important for accuracy in certain applications.
USPTO Backgrounds
USPTO Backgrounds