I. Field of the Disclosure
The technology of the disclosure relates generally to content addressable memory (CAM), and more particularly to CAM employing non-volatile memory (NVM) cells.
II. Background
Content addressable memory (CAM) is a type of computer memory used in high speed searching applications. Examples of applications that may employ a CAM for high-speed searching include an anti-virus checker in mobile devices and pattern recognition for a wireless sensor. A CAM compares a string of input search data with stored data, and outputs an address of matched data. A CAM enables parallel searching of the input search data in a single clock cycle.
In this regard, FIG. 1 illustrates a conventional CAM 100. The CAM 100 could be a binary CAM capable of storing a data word in two states (i.e., ‘0’ or ‘1’), or a ternary CAM capable of storing a data word with three states (i.e., ‘0’, ‘1’ and don't care ‘X’). The CAM 100 includes CAM cells 102 arranged into a number of CAM cell arrays 104(0)-104(N), wherein ‘N+1’ equals the desired number of CAM cell arrays 104(0)-104(N) provided. Each of the CAM cells 102 is a conventional semiconductor memory cell and has comparison circuitry. The CAM cell arrays 104(0)-104(N) store corresponding digital words. In addition, the CAM cell arrays 104(0)-104(N) include corresponding valid bit circuitry 106(0)-106(N). For each CAM cell array 104(0)-104(N), the corresponding valid bit circuitry 106(0)-106(N) stores a bit value that represents a validity of the respective CAM cell array 104(0)-104(N). Each CAM cell 102 in a respective CAM cell array 104(0)-104(N) is coupled to a corresponding match line 108(0)-108(N) that is pre-charged as part of a search operation. Then, during an evaluation mode of the search operation, the CAM 100 is searched by a search line driver circuitry 110 asserting search data 112(0)-112(M) of ‘M+1’ bits onto search lines SL(0)-SL(N). In this example, the CAM cells 102 employ differential sensing such that a complementary search word is also provided on complementary search lines SLB(0)-SLB(N). The CAM cells 102 in their respective CAM cell arrays 104(0)-104(N) are configured to discharge their respective match line 108(0)-108(N) in response to a mismatch between the search data 112(0)-112(M) and the data stored in the respective CAM cell array 104(0)-104(N). A respective match line hold circuit 114(0)-114(N) holds the state of the respective match line 108(0)-108(N) until latched by a latch clock signal (LATCH_CLK) 116.
A static random access memory (SRAM)-based CAM is one example of a CAM. An SRAM-based CAM employs SRAM-based CAM cells for storing data. During a sleep mode, an SRAM-based TCAM employs a non-volatile memory (NVM) macro to retain stored data in TCAM cells. However, this requires long back-up and boot-up processes, leading to increased power consumption and speed overhead. To realize zero standby power with reduced power consumption and speed overhead, a non-volatile (NV)-TCAM cell employing magnetic tunnel junction (MTJ) storage elements has been proposed. For example, FIG. 2A is a circuit diagram of an exemplary six (6) transistor (T) (6T)-two (2) MTJ (2MTJ) non-volatile (NV)-ternary CAM (TCAM) (6T-2MTJ NV-TCAM) cell 200 (referred to as “TCAM cell 200”). The TCAM cell 200 includes a comparator circuit 202 that includes a pair of MTJ devices 204(1), 204(2). The comparator circuit 202 includes a load transistor (MCS) having a gate coupled to a bias voltage VB that provides a constant current source to generate a bias current (IB), and two clamp transistors (MC1, MC2) coupled between a drain of the load transistor (MCS) and the respective MTJ devices 204(1), 204(2). The MTJ devices 204(1), 204(2) being in a parallel (P) state results in the MTJ devices 204(1), 204(2) having a lower resistance than when the MTJ devices 204(1), 204(2) are in an anti-parallel (AP) state. The comparator circuit 202 is coupled to a keeper circuit provided as keeper transistor (MD) coupled to a match line (ML).
During a search operation, the match line (ML) is first pre-charged to a match line voltage (VML) during a pre-charge mode (e.g., VDD). Thereafter, during an evaluation mode, search data and complementary search data is asserted onto search line (SL) and complementary search line (/SL), respectively. This causes a cell current (ICELL) from the load transistor (MCS) to flow through one of (i.e., the activated) clamp transistor (MC1, MC2) and its respective MTJ device 204(1), 204(2). The cell current (ICELL) is a function of the resistance (R1, R2) of the activated MTJ devices 204(1), 204(2), which is based on the stored data (i.e., P or AP state) in the MTJ devices 204(1), 204(2). A cell voltage (VCELL) at the drain of the load transistor (MCS) is controlled by the difference between the bias current (IB) and the cell current (ICELL). As shown in a graph 206 in FIG. 2B, a higher cell voltage (VCELL-H) occurs in the TCAM cell 200 for a match condition between the stored data in the TCAM cell 200 and the search data. A lower cell voltage (VCELL-L) occurs in the TCAM cell 200 for a mismatch condition between the stored data in the TCAM cell 200 and the search data. Thus, the match line voltage (VML) for a match condition (i.e., match and mismatch) between the stored data in the TCAM cell 200 and the search data on the match line (ML) is a function of a threshold voltage across the keeper transistor (MD) and the cell voltage (VCELL). Because the load transistor (MCS) and the activated clamp transistor (MC1, MC2) pre-amplify the cell voltage (VCELL) difference between match and mismatch conditions, the match line (ML) can be sensed to determine whether the search data matched or mismatched the stored data in the TCAM cell 200.
For example, as shown in FIG. 3A, a match condition in a TCAM cell array 300 of the TCAM cell 200 in FIG. 2A coupled to a joint match line (ML) causes the match line voltage (VML) to discharge from the pre-charge voltage (VDD) to the higher cell voltage (VCELL-H)+the threshold voltage (VTH) of the keeper transistor (MD). Thus, the keeper transistor (MD) is turned off. However, as shown in FIG. 3B, in the case of a mismatch condition, the keeper transistor (MD) of the TCAM cell 200 in a mismatch condition is not cut off since its cell voltage (VCELL) is the lower cell voltage (VCELL-L). Thus, the match line (ML) is continuously discharged by the TCAM cell(s) 200 in a mismatch condition to a match line voltage (VML) of the lower cell voltage (VCELL-L)+the threshold voltage (VTH). The difference in the match line voltage (VML) between the match and mismatch conditions (i.e., VCELL-H−VCELL-L) is the sense margin of the TCAM cells 200 in the TCAM cell array 300.
Thus, while the TCAM cell 200 in FIG. 2A has the advantage of realizing zero standby power with reduced power consumption and speed overhead, the sense margin is smaller (e.g., 0.1V) than an SRAM-based TCAM cell. Thus, the TCAM cell 200 in FIG. 2A is vulnerable to the offset voltage of a match line (ML) sense amplifier. Additionally, the sense margin of the TCAM cell 200 is also sensitive to process variations in the load transistor (MCS) and the clamp transistors (MC1, MC2). The size of the load transistor (MCS) and the clamp transistors (MC1, MC2) can be increased to mitigate process variations, but increasing the size of the load transistor (MCS) and the clamp transistors (MC1, MC2) increases the cell area of the TCAM cell 200. Further, even though the keeper transistor (MD) of the TCAM cell 200 is turned off during a match condition, reverse leakage current can flow into the match line (ML) because of the higher drain-to-source voltage of the keeper transistor (MD). As word length, and thus the word line (WL), of a TCAM employing the TCAM cells 200 increases, this reverse current leakage can leak from the TCAM cell 200 in a match condition to the TCAM cell 200 in a mismatch condition, thus leading to degradation of search operation reliability. Further, if a global bias voltage generator circuit is employed in a TCAM of the TCAM cell 200, global bias voltage (VB) is used to bias load transistors (MCS) in the TCAM cell 200 in a TCAM, a coupling noise effect can lead to degradation of search performance.
USPTO Backgrounds
USPTO Backgrounds