As the transistor density and size of high performance integrated circuits, such as microprocessors increases, power usage and attendant heat generation increase as well. This becomes a significant problem during test of the integrated circuit chip, as the integrated circuit must be cooled to avoid thermally induced test result errors or even integrated circuit chip failures. Testing is often performed with the integrated circuit chip temporarily mounted on a test substrate. Increasingly, conventional cooling employed during test is insufficient to maintain the integrated circuit chip at a precise temperature. Therefore, there is a need for an efficient method and apparatus for thermally coupling an integrated circuit chip under test to a heat sink.
USPTO Backgrounds
USPTO Backgrounds