Some MOSFET driver circuits act as an interface between the low-power switching signals such as generated by a pulse width modulator (PWM) and a power MOSFET to provide high drive current to supply the charge to the gate of the power MOSFET and to provide the full rail to rail voltage on the gate. The MOSFET driver circuit's current rating and the power MOSFET gate charge predominately determine how quickly the MOSFET can switch on and off.
Driver circuits using MOS-only drive stages are able to fully switch the power MOSFET between the two power rails, VDD and ground, which is not possible with a bipolar only driver circuit. The disadvantage of a MOS-only driver circuits is the inability to source high gate currents at low voltage, such as the power MOSFET threshold voltage.
As a result compound driver circuits consisting of a combination of bipolar and MOS power devices have been developed. An example of this type of circuit is shown in FIG. 1. In FIG. 1 an input signal passes through an amplifier 10 which drives the gates of an upper P-channel MOSFET 12 and a lower N-channel MOSFET 14, the base of a lower NPN bipolar transistor 16 and is input to an inverter 18, the output of which drives the base of an upper NPN bipolar transistor 20. There is a common node connected to each of the MOSFETs 12, 14 and the bipolar transistors 16, 20 which drives the gate of an N channel power MOSFET 22. A low input signal turns on both P-channel MOSFET 12 and the upper bipolar transistor 20 to turn on the power MOSFET 22 and makes the gate of the power MOSFET 22 to VDD. A high input signal turns on both N-channel MOSFET 14 and the lower bipolar transistor 16 to discharge the gate of the power MOSFET 22 and turns the gate of the power MOSFET 22 to ground. The bipolar transistors 16, 20 provide the rated current where it is needed most, at the Miller plateau of the power MOSFET 22.
However, the added high-voltage high-performance bipolar transistors 16, 20 increase fabrication cost. Moreover, the specific on-resistance R (sp, on) of the bipolar transistors 16, 20 can not be simply reduced by scaling its design according to the CMOS lithography rule, as LDMOS does, and therefore a large die size is required for the bipolar transistors 16, 20, even using advanced process technology codes.
USPTO Backgrounds
USPTO Backgrounds