As a storage chip without loss of data after power-off, An electrically erasable programmable read-only memory (EEPROM) has advantages of non-volatility, byte erasability, fast programming speed and the like. EEPROM is programmed without removing the EEPROM from the system, so that it is convenient, efficient and feasible to storage and update (or program) data. EEPROM makes it possible to perform the remotely programming process over radio or wires, which eliminates the light-transmission window for ultraviolet light of EEPROM. The package cost of EEPROM is low, and the test of EEPROM is simple, resulting in its widespread application.
The readout circuit is an essential part in the memory design and to a large extent decides the important parameter of a reading time of the memory. However, the current of the memory unit will drift as the manufacturing process drifts. Meanwhile, the number of the readout circuits will increase correspondingly as digits of the memory increases, resulting in a more widespread distribution of the readout circuits in the whole chip. Therefore, the readout circuits are more easily subject to some negative influences during the manufacturing process.
In the conventional solution, as shown in FIG. 1, M0 is a charge transistor and controlled by the signal Pre_charge. When the readout circuit begins to work, the Pre_charge signal is a low pulse, and right now the power source potential VDD charge the first node A by M0 to increase the potential of the first node A. As the potential of the first node A increases, the potential of the node B will reduce gradually, and the transistor M3 is turned on. Right now the first node A is pulled-up by a pull-up current, and the magnitude of this current is determined by the transistors M1 and M2. If the decoded EEPROM cell is an erased cell, i.e. the starting voltage threshold of this cell is very low, and then there will be a current flowing through EEPROM cell. The voltage of the first node A is pulled-down, and right now the corresponding Out is “0”. The corresponding timing diagram is shown in FIG. 2.
Although the readout circuit can well control charging of the first node A, it easily results in false charge because there is no detection circuit in the readout circuit. Moreover, the charging speed of the readout circuit is slower, resulting in a slow reading speed of the readout circuit, which can not satisfy the great reading requirement. Therefore, it is necessary to improve the conventional readout circuit to overcome the above disadvantages.
USPTO Backgrounds
USPTO Backgrounds