The present invention relates to micro-electronics devices and methods of manufacturing same, and more particularly to improvements in low dielectric constant materials for use in the formation of micro-electronics devices. The invention has particular utility for the manufacture of integrated circuits of the so-called "thick film" type and will be described in connection with such utility although other uses are contemplated.
In manufacturing very large scale integrated (VLSI) devices according to thick film procedures, alternating layers of electrically conductive and electrically insulative materials typically are disposed on a rigid support substrate formed of an insulative material in a process much like the traditional silk screening process used in the graphics arts industry.
In the standard thick film process for producing VLSI devices the first step in the process is to screen print a so-called "ink" onto a rigid dielectric base or substrate board, air dry the ink, and fire the ink to form a first metal pattern on the substrate board. Typically, the substrate board comprises glass, porcelain-coated metal or a ceramic such as alumina or beryllia, and the ink comprises a relatively high viscosity mixture of electrically conductive metals such as silver, gold or copper or metal alloys such as gold-palladium, or silver-palladium and a vitreous binder suspended in an organic vehicle or thinner. The screen printing typically is performed through a silk or fine stainless-steel mesh screen that has been previously patterned in the desired pattern of the metal layer or circuit. The screen is placed over the substrate and a squeegee is used to force the screen down to the substrate and, simultaneously, force the ink through the patterned mesh of the screen and down onto the surface of the substrate. The patterned substrate is then air dried to evaporate off at least a portion of the organic vehicle, and the patterned, dried substrate then is fired in an oven to bond the electrically conductive metals to the substrate. A coating or layer of dielectric/insulating material, typically a glass ceramic in a vitreous binder and organic vehicle is then applied over the fired metal pattern, the insulating material is air dried to evaporate at least a portion of the organic vehicle, and the dried coating is then fired in a furnace or kiln as before to bond the insulation coating to the metal-patterned substrate. Alternatively, the conductive patterns and dielectric/insulating layer may be co-fired. The process is repeated with alternating patterned metal layers and dielectric layers until the desired number of layers are completed. By providing passageways in the insulating layers (referred to as "vias"), conductive paths can be created therethrough interconnecting the metal conducting layered patterns enabling a three dimensional interconnected pattern to be fabricated. The vias for layer to layer interconnection may be formed as part of the layering process. Alternatively, the vias may be formed by using a laser to create overlapping holes in the dielectric insulating layers which then may be back filled with metal to create the connective interconnections between layers. In this manner, structures of ten and more metal layered patterns have been fabricated for high reliability hybrid microcircuit devices.
The dielectric properties of the insulating layers are a limiting factor in the size and performance characteristics of the VLSI circuit. For example, where there is overlap between metal on adjacent layers, there is a capacitance created. Thus, higher frequencies occurring at higher circuit operating speeds and the like, may cause capacititive coupling (slowing the signal or causing cross talk), between the layers at these points by this unavoidable capacitance. The presently employed dielectric materials for forming the insulating layers generally comprise glass ceramics and ceramic/glass composites. Glass ceramics are glasses which are devitrified by heating to form a very fine network of crystalline phase material. Glass ceramics are mechanically strong and have relatively low thermal expansion coefficients which makes them particularly suited for VLSI chip attachment and thick film device processing techniques as above described. However, commercially available glass ceramics and composites have a dielectric constants in the range of 9 to 12, and an electrical insulation resistance of about 10.sup.12 Ohms and higher at room temperature and 300 volts. Due to their electrical properties and process constraints, line/space sizing of circuits on thick film devices made using glass ceramic dielectrics generally is about 0.007/0.007 inches minimum, via sizes generally are about 0.010 inches minimum width, and the thickness of the dielectric material to attain satisfactory performance generally is about 0.0015 inches minimum.
Accordingly, if a material having a lower dielectric constant could be employed for forming the insulating layers in VLSI circuits, the useful frequency range before interlayer-capacitance becomes a problem can be increased and propagation delay decreased.
Wherefore, it is the object of the present invention to overcome the aforesaid and other disadvantages of the prior art. A more specific object is to provide an improved thick film process characterized by the use of a new and improved low dielectric constant insulative material. Still other objects and many of the attendant advantages of the invention will become clear from the following description.
USPTO Backgrounds
USPTO Backgrounds