The present invention generally relates to television receivers provided with a delay circuit, and more particularly to a television receiver provided with a delay circuit for delaying a signal being transmitted through a video signal processing circuit systems, so that the signal transmitted through the video signal processing system is delayed by a natural number multiple one one horizontal scanning period with respect to a signal transmitted through a circuit system which is parallel to the video signal processing circuit.
Recently, the so-called digital television receiver is being reduced to practice. An analog video signal is converted into a digital signal, subjected to a predetermined signal processing, returned to an analog signal and then applied to the digital television receiver. According to the digital television receiver, the number of required parts and the number of required adjustments are reduced from the manufacturing point of view compared to the analog systetm. Further, the operation error in the digital television receiver is small compared to the analog system, and for this reason, the phrase characteristic and the signal-to-noise (S/N) ratio of the digital television receiver are more satisfactory compared to the analog system. It is possible to obtain a stable picture having a high picture quality. In addition, since the digital television receiver performs a digital signal processing, the digital television receiver can easily be coupled to a videotex, a teletext, a personal computer and the like.
A digital video signal processing cicuit within the digital television receiver of this type comprises an analog-to-digital (A/D) converter for converting an input analog video signal into a digital video signal, a digital filter for separating a chrominance signal and a luminance signal from the digital video signal, a digital filter for processing the luminance signal, an operation circuit for processing the chrominance signal so as to obtain digital primary color signals, a digital-to-analog (D/A) converter for converting the digital primary color signals into analog primary color signals and the like. A clock signal having a frequency which is an integral number multiple of a chrominance subcarrier frequency f.sub.sc (for example, 3f.sub.sc or 4f.sub.sc) is used in the digital circuits within the digital video signal processing circuit, and for this reason, a time delay having a minimum unit of one period of the clock signal occurs in the digital video signal processing circuit. Accordingly, the digital video signal processing circuit as a whole has a delay time in the order of several microseconds.
On the other hand, a deflection circuit for producing horizontal and vertical deflection voltage signals to a deflection electrode of a picture tube is an analog circuit, and there is virtually no delay in the deflection circuit. Hence, when the primary color signals having delay and the deflection signals having virtually no delay are applied to the picture tube as they are, the reproduced picture is displayed on the picture tube at a position shifted to the right from a regular display position by a distance corresponding to the delay time of the digital video signal processing circuit.
Accordingly, in orer to correct the above described shift in the display position of the reproduced picture, a delay circuit is conventionally provided in series with the deflection circuit so as to delay the deflection signals by a delay time equal to the delay time of the digital video signal processing circuit. However, because the delay time of the digital video signal processing circuit is in the order of several microseconds and is large as described before, a delay device which requires a driving clock signal such as a charge coupled device (CCD) must be used for the delay circuit which is provided in series with the deflection circuit. Consequently, it becomes necessary to provide a driving circuit for driving the delay circuit, and there is a problem in that the circuit construction becomes complex.
On the other hand, in a case where a teletext decoder for separating a teletext signal from a composite video signal so as to obtain a character signal and for mixing the character signal with the primary color signals so as to supply the mixed signal to the picture tube, is an analog circuit, it is necessary to provide in series with the teletext decoder a delay circuit which has a delay time approximately the same as the delay time of the digital video signal processing circuit. In this case, it is necessary to provide a driving circuit for driving the delay circuit, as in the case described before. Therefore, there is a problem in that the circuit construction becomes complex.
A problem similar to that described before occurs regardless of whether the video signal processing circuit is a digital circuit, such as a case where the video signal processing circuit is an analog circuit using a transversal filter, for example, because the video signal processing circuit will have a relatively large delay time in this case. In addition, as for the coupling of the television receiver with an external device, the external device is not limited to the teletext decoder. For example, the television receiver may be coupled to a personal computer and may be supplied with a superimposing signal from the personal computer, and a problem similar to that described before also occurs in this case.
USPTO Backgrounds
USPTO Backgrounds