To avoid the problem of parasitic thyristor latching, IGBT type devices must be made to very fine geometries with accurate alignment of the photolithographic processes used in their manufacture. This makes the production of such devices expensive in comparison to conventional bipolar devices which have much coarser structures. Any simplification which can reduce the need for alignment accuracy without sacrificing the resistance to latching is therefore of economic benefit.
A good over-view of the design of such structures can be found in "MODERN POWER DEVICES", B. Jayant Baliga, pp350-401. It can be learnt from this (pp397-398) that it is necessary to introduce a p.sup.+ diffused region which must be accurately aligned with respect to the gate and that this is critical to the latching current density of the device as will be explained later. A modification of this structure to improve further the resistance to latching is known from A. Nakagawa, et al "Non latch-up 1200 volt bipolar mode MOSFET with large SOA", IEEE International Electron Device Meeting Digest, Abstract 16.8, pp860-861 (1984). While this modification improves the latching resistance it still retains the same processing requirement for the p.sup.+ diffused region. Also, this structure substantially reduces the available channel width with a consequent increase in on-state voltage.
In a further prior art structure (EP-A-0 405 138 and EPA-0 690 512) an arrangement is disclosed in which higher concentration p.sup.+ doped regions are introduced selectively into the p-base. These provide preferential paths for the transport of majority carriers (holes) to the ohmic source electrode without causing direct injection from the n-source region which may occur if the ohmic drop resulting from the passage of such current exceeds a small value, typically about 0.5V, at the junction between the n-source and p-base regions. The n-source is in the form of segmented strips, leaving gaps, typically greater than twice the length of the channel path, which accommodate the higher concentration regions. Again, the total channel width available in a given size of cell is considerably reduced according to the proportion of the gaps inserted in an n-source strip. In section, the relevant feature of the arrangement looks essentially the same as that of A. Nakagawa, et al. There are lines of segmented source strips at right angles to the gate, but the objective is to cause a decrease in the saturation current of the channel by reducing its length. For this purpose, if the spacing between the source strips is defined as D and the length of the channel in the direction of current flow is defined as L, then it requires that D&gt;2L, effectively reducing the channel width. In the present invention, it is preferred that D&lt;2L.
EP-A-0 060 912 relates to a method of switching a purely bipolar thyristor device using a MOS device in an external circuit. A device with cathode strips has a sheet-like base layer with no strip orientation while the contacts to the base layer appear to run parallel to the cathode strip except outside their ends. There is no parasitic thyristor action which needs to be suppressed.
WO 93/05535 discloses an IGBT structure but this is a trench structure with source strips parallel to the gate.
US-A-4 994 871 relates to a trench IGBT structure not a planar one. It describes source strips at right angles to the base (gate) strips but does not consider the widths of the strips nor the relationship D&lt;2L. There may also be mentioned: U.S. Pat. No. 5,581,100 (a MOSFET, not an IGBT, with strips of a highly doped conductivity type in a low doped region of the same conductivity, not an opposite type); U.S. Pat. No. 4,963,950 (a trench not a planar structure and strips not at right angles to the gate); JP-A-7-050406 (a pure bipolar device and therefore having no gate or parasitic thyristor); JP-A-6-140626 (although connecting electrodes run, in part, at right angles to diffused base and source strips, the latter are parallel to each other); JP-A-1-218065; and JP-A-60-130168 (with a parallel base and emitter electrode strip structure, but the base layer being continuous and not strip-like).
USPTO Backgrounds
USPTO Backgrounds