The proliferation of modern electronic devices has demands spiraling upwardly for integrated circuits (“IC”) chips. These demands pertain not just to shipping volumes and lead times, but just as importantly they pertain to the demands for ever more complex design and functionality. Also in play are contrary demands for rigorous cost constraints in the consumer electronics industry.
These demands are being addressed by solutions dealing with both product design and product manufacturing approaches. For example, very large scale integration (VLSI) manufacturing approaches have made some inroads in reducing costs in silicon substrates, and in miniaturizing circuitry while increasing complexity of the IC chips. Heightened attention to process control and continuous process improvement has made inroads in increasing production yields of IC chips from a wafer. Packaging trends have made inroads in combining separate functionalities in a single IC chip, in packaging multiple IC chips in a single multi-chip package, and in stacking IC chips in order to save space and improve connections on printed circuit board assemblies.
In maximizing production yield of IC chips from a wafer, the objective of functional testing for qualifying the chips runs directly contrary to the objective of production throughput. Both of these goals are critical to meeting industry demands for a plentiful supply of quality IC chips.
While various proposed testing methodologies have been found operable, with the continued advancements in IC chip complexity, there remains a continued need for improvements in the manner in which a wafer of IC chips is qualified. It is to such improvements that the claimed invention is generally directed.
USPTO Backgrounds
USPTO Backgrounds