The present invention is directed to integrated circuits. More particularly, the invention provides a system and method for analog-to-digital conversion. Merely by way of example, the invention has been pipelined analog-to-digital converter used in high speed application. But it would be recognized that the invention has a much broader range of applicability.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as a given process, device layout, and/or system design often work down to only a certain feature size. For example, one of design challenges is to provide quality analog-to-digital converters (ADC) on integrated circuits.
An ADC is an electronic device that receives an analog input signals (e.g., voltage reading, etc.) and converts the analog reading into a digital reading. For example, an ADC converts a voltage reading into a digital number. Typically, an ADC continuously converts input signals into digital reading.
An ADC has a wide range of applications. Over the past, various types of ADCs have been developed. For example, direct conversion ADCs, successive-approximation ADCs, delta-encoded ADCs, ramp-compare ADCs, and Sigma-Delta ADCs have been used for a variety of applications.
More recently, pipeline ADCs have been implemented in ICs to provide a solution for applications requiring high speed analog-to-digital conversion. Also known as subranging quantizer, a pipeline ADC utilizes a two-step process for analog-to-digital conversion. First, a coarse conversion is performed. For example, a comparison is made between an analog input voltage and a reference voltage. Next, a fine conversion is performed. The results from the coarse and fine conversions are combined to provide a result (e.g., a two big digital output). Typically, a pipeline ADC is able to provide a digital output within two clock cycles (e.g., one for coarse conversion, and one for fine conversion). To further speed up the conversion process, multiple ADCs are often used together.
Like other types of ADCs, the pipeline ADCs face various design challenges. For example, problems such as quantization errors, non-linearity, and aperture error, often limit ADC performance (e.g., accuracy, power consumption, size, etc.). In the past, various conventional techniques have been developed for pipeline ADCs. Unfortunately, convention techniques are often inadequate.
Therefore, it is desirable to have an improved method and system for analog-to-digital converters.
USPTO Backgrounds
USPTO Backgrounds