Manufacturing a printhead that has relatively high resolution and print-speed raises a number of issues.
One of these relates to the provision of drive and control signals to nozzles. One way to do this is to have a CMOS layer in the same substrate as the print nozzles are constructed. This integration saves space and enables relatively short links between drive circuitry and nozzle actuators.
In a typical layout, such as that disclosed by applicant in a number of the cross-referenced applications, each color in a printhead includes an odd and an even row, which are offset across the pagewidth by half the horizontal nozzle pitch. Each nozzle and its drive circuit are arranged, in plan, in a line parallel to the direction of print media travel relative to the printhead. Moreover, all the nozzle/circuitry pairs in printhead are orientated in the same way. Using odd and even rows offset by half the horizontal nozzle pitch allows dots to be printed more closely together across the page than would be possible if the nozzles and associated drive circuitry had to be positioned side by side in a single row. Dot data to the appropriate row needs to be delayed such that data printed by the two rows ends up aligned correctly on the page.
That said, the relative difference in space requirement for the CMOS and nozzles means there is still some wasted area in the printhead. Also, in designs where high-voltage circuitry is disposed adjacent low-voltage circuitry from another row, careful design and spacing is required to avoid interference between the two.
It would be desirable to improve space usage in a printhead circuit having multiple rows of print nozzles, or at least to provide a useful alternative to prior art arrangements.
USPTO Backgrounds
USPTO Backgrounds