Advances in integrated circuit technology continuously demand increasing device and current densities. As a result, electromigration-induced failure of on-chip interconnects is becoming a critical reliability issue. With respect to an on-chip interconnect, electromigration-induced performance reduction or failure is a major concern. Electromigration is the transfer of material in the on-chip interconnect due to a momentum transfer between conducting electrons and diffusing metal atoms. The use of high current densities and densely packed on-chip interconnect structures in an integrated circuit results in electromigration-induced void formation. Specifically, FIG. 1A is a top down view of a traditional on-chip interconnect segment 10. The on-chip interconnect segment 10 is connected to another metal layer using vias 12 and 14. The term ‘via’ is commonly used as it is used here. However, the connections between metal layers are sometimes referred to as contacts. Both the on-chip interconnect segment 10 and the vias 12 and 14 are formed of a conductive material, namely, metal. Assuming that the via 12 is at an anode end of the on-chip interconnect segment 10 and the via 14 is at a cathode end of the on-chip interconnect segment 10, an electromigration-induced void 16 forms at the cathode of the on-chip interconnect segment 10. As the void 16 increases in size, a resistance of the on-chip interconnect segment 10 increases, thereby reducing performance. Eventually, the void 16 grows to a point that an open-circuit is created and a complete failure occurs, as illustrated in FIG. 1B. Thus, there is a need for a system and method reducing the effects of electromigration on the reliability of on-chip interconnects for an integrated circuit.
USPTO Backgrounds
USPTO Backgrounds