1. Field of the Invention
The present invention relates to a method of making a wireless semiconductor device. The present invention also relates to a leadframe used for employing such a method.
2. Description of the Related Art
FIG. 18 of the accompanying drawings shows the basic structure of a conventional wireless semiconductor device. In this specification, “wireless” refers to a structure wherein terminal leads are directly soldered to a semiconductor chip, thereby using no connection wires.
As seen from FIG. 18, the conventional device S′ includes a semiconductor chip 90, a first lead 91a, and a second lead 91b. The chip 90 is provided with a flat lower electrode 90a on its bottom surface, and with a protruding upper electrode 90b on its top surface. The lower electrode 90a is connected to the first lead 91a via solder Ha, while the upper electrode 90b is connected to the second lead 91b via solder Hb. The chip 90 and inner portions of the leads 91a, 91b are enclosed by a resin package 92. The projecting portions of the leads 91a, 91b are flush with the bottom surface of the package 92, so that the device S′ can readily be surface mounted on a printed circuit board.
The conventional device S′ is fabricated in the following manner. First, referring to FIG. 19, a conductive leadframe 91 is prepared. The frame 91 includes connection strips 91a′ and 91b′. The strips 91a′, 91b′ are bent in a manner such that their terminal portions are vertically spaced. Then a semiconductor chip 90 is placed between these terminal portions, with solder paste H(Ha, Hb) applied, as shown in the figure. Then, this intermediate assembly of the chip 90 and frame 91 is moved into a furnace (not shown) to melt the solder paste H. Afterward, the chip-frame assembly is taken out of the furnace, to cause the molten solder H to solidify. Thereafter, though not shown in the figure, a resin package is formed to enclose the chip 90 together with parts of the connection strips 91a′, 91b′. Finally, the strips 91a′, 91b′ are cut off from the frame 91, so that a product device is obtained.
While the conventional semiconductor device S′ is functional, it suffers from the following drawback.
In the device S′, the solder Ha and the solder Hb have the same composition, thereby exhibiting the same melting point. Thus, when the chip-frame assembly is taken out from the furnace after the applied solder has been melted, it can happen that the upper solder Hb may solidify earlier than the lower solder Ha.
However, when the solidification of the upper solder Hb precedes that of the lower solder Ha, the semiconductor chip 90 may be pulled toward the upper connection strip 91b′, as shown in FIG. 20, thereby tilting unduly. In the conventional device, the protruding upper electrode 90b tends to aggravate the unbalanced state of the chip 90. Unfavorably, the tilting of the chip 90 may leave an undesired large gap S between the chip 90 and the connection strip 91a′. The gap S may damage otherwise good electrical conduction between the chip 90 and the strip 91a′. In addition, the tilting of the chip 90 may cause the upper solder Hb in a molten state to run down the chip 90 onto the lower solder Ha, thereby short-circuiting the lower and the upper strips 91a′, 91b′. 
USPTO Backgrounds
USPTO Backgrounds