Memory chips comprise an array of memory cells which are interconnected by bit lines and word lines. The word lines and bit lines are used to read and write binary values to each of the memory cells. Each of the memory cells represents a bit of information. Since each memory cell represents a bit of information and may be connected to other circuitry, it is desirable that the electrical and operational characteristics of all memory cells be consistent.
Single ended sensing is often used with a matchline (ML) in Content Addressable Memory (CAM) and a bitline in eight-transistor Static Random Access Memory (8T SRAM). Often, these lines are held low when idle to save leakage power. To perform an operation, the matchlines or bitlines are pre-charged and then evaluated (e.g., sensed). However, single ended sensing has issues of performance due to random device variations (RDV).
Self-referenced sense amplifiers address the problems associated with RDV by performing a self-calibration to their respective thresholds to reduce the effects of RDV between adjacent sense amplifiers. Conventional self-referenced sense amplifiers require a globally timed signal, i.e., a clock-based signal that is applied to a plurality of sense amplifiers to have the same amount of pre-charge time. However, due to process variations, some sense amplifiers may not require the full-pre charge time in order to reach their particular pre-charge level. This results in some sense amplifiers sitting idle in the pre-charge phase after they have reached their pre-charge level but before the globally timed signal turns off the pre-charge.
USPTO Backgrounds
USPTO Backgrounds