Crosstalk has become a critical factor in limiting performance in semiconductor packages. This is particularly true in the case of packages with differential pin pairs. There are no good current solutions to this problem. In general, the package has to tolerate the existing crosstalk level for the socket and/or connector. This typically results in degraded performance or reduced routing lengths.
Highly isolated and yet very compact differential pair pinout is the goal of package pinout definitions for digital high speed applications. To address the requirement that in Gb/s digital signaling, isolation between differential pairs must be kept very high many concepts are developed but all of them significantly increase the pincount to achieve isolation. The most commonly used pinout pattern is the diagonal shielding in which the number of differential pairs between diagonal reference lines defines signal to reference ratio. To allow 1:1 ratio, only one differential pair is allowed between diagonal reference lines and still additional reference pins are needed between each diff pair to achieve the best isolation between them, which is often expensive.
Accordingly, there are long-felt industry needs for apparatus and methods that improve upon conventional methods including the improved methods and apparatus provided hereby.
The inventive features that are characteristic of the teachings, together with further objects and advantages, are better understood from the detailed description and the accompanying figures. Each of the figures is provided for the purpose of illustration and description only, and does not limit the present teachings.
USPTO Backgrounds
USPTO Backgrounds