To obtain greater capacitance density, three plate MIM capacitors have been utilized as decoupling capacitors located between metal layers of integrated circuit devices. The three plate MIM capacitor includes a top plate, middle plate, and bottom plate, each separated by an insulator. Each plate may be electrically connected to a wire within a metal layer below or above the three plate MIM capacitor by a via.
Typically, the via is fabricated by forming a vertical trench by etching multiple layers of the insulator. Due to different material properties of the multiple layers, the via etch may undesirably traverse horizontally, and thereby form a pocket located outside a predetermined vertical bound of the trench. Prior to forming the via within the trench, a liner may be formed upon the vertical trench sidewall to attempt to create the desired vertical bound of the trench. However, the liner may not effectively fill or cover the pocket and conductive material may be formed within the trench during via formation or may later leak into the pocket during operation of the semiconductor device. The conductive material within the pocket may result in undesired electrical shorting.
USPTO Backgrounds
USPTO Backgrounds