<stg><name>Loop_2_proc</name>


<trans_list>

<trans id="24" from="1" to="2">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="33" from="2" to="5">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="34" from="2" to="3">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="31" from="3" to="4">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="32" from="4" to="2">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>
</trans_list>



<state_list>

<state id="1" st_id="1">

<operation id="6" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="3" bw="0" op_0_bw="0" op_1_bw="64" op_2_bw="0" op_3_bw="32" op_4_bw="32" op_5_bw="0" op_6_bw="32" op_7_bw="32" op_8_bw="0" op_9_bw="0" op_10_bw="0" op_11_bw="32" op_12_bw="32" op_13_bw="32" op_14_bw="32" op_15_bw="0" op_16_bw="0">
<![CDATA[
newFuncRoot:0  call void (...)* @_ssdm_op_SpecInterface(i64* %res_output_V, [5 x i8]* @p_str2, i32 1, i32 1, [5 x i8]* @p_str3, i32 0, i32 1024, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1)

]]></Node>
<StgValue><ssdm name="specinterface_ln0"/></StgValue>
</operation>

<operation id="7" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="4" bw="0" op_0_bw="0">
<![CDATA[
newFuncRoot:1  br label %0

]]></Node>
<StgValue><ssdm name="br_ln425"/></StgValue>
</operation>
</state>

<state id="2" st_id="2">

<operation id="8" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="6" bw="8" op_0_bw="8" op_1_bw="0" op_2_bw="8" op_3_bw="0">
<![CDATA[
:0  %i1_0 = phi i8 [ 0, %newFuncRoot ], [ %i, %hls_label_1 ]

]]></Node>
<StgValue><ssdm name="i1_0"/></StgValue>
</operation>

<operation id="9" st_id="2" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="7" bw="1" op_0_bw="8" op_1_bw="8">
<![CDATA[
:1  %icmp_ln425 = icmp eq i8 %i1_0, -128

]]></Node>
<StgValue><ssdm name="icmp_ln425"/></StgValue>
</operation>

<operation id="10" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="8" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
:2  %empty = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 128, i64 128, i64 128)

]]></Node>
<StgValue><ssdm name="empty"/></StgValue>
</operation>

<operation id="11" st_id="2" stage="1" lat="1">
<core>AddSub</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="9" bw="8" op_0_bw="8" op_1_bw="8">
<![CDATA[
:3  %i = add i8 %i1_0, 1

]]></Node>
<StgValue><ssdm name="i"/></StgValue>
</operation>

<operation id="12" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="10" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
:4  br i1 %icmp_ln425, label %.exitStub, label %hls_label_1

]]></Node>
<StgValue><ssdm name="br_ln425"/></StgValue>
</operation>

<operation id="13" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="14" bw="64" op_0_bw="8">
<![CDATA[
hls_label_1:2  %zext_ln428 = zext i8 %i1_0 to i64

]]></Node>
<StgValue><ssdm name="zext_ln428"/></StgValue>
</operation>

<operation id="14" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="15" bw="7" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_1:3  %res_digits_data_V_ad = getelementptr [128 x i64]* %res_digits_data_V, i64 0, i64 %zext_ln428

]]></Node>
<StgValue><ssdm name="res_digits_data_V_ad"/></StgValue>
</operation>

<operation id="15" st_id="2" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="16" bw="64" op_0_bw="7">
<![CDATA[
hls_label_1:4  %res_digits_data_V_lo = load i64* %res_digits_data_V_ad, align 8

]]></Node>
<StgValue><ssdm name="res_digits_data_V_lo"/></StgValue>
</operation>
</state>

<state id="3" st_id="3">

<operation id="16" st_id="3" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="16" bw="64" op_0_bw="7">
<![CDATA[
hls_label_1:4  %res_digits_data_V_lo = load i64* %res_digits_data_V_ad, align 8

]]></Node>
<StgValue><ssdm name="res_digits_data_V_lo"/></StgValue>
</operation>

<operation id="17" st_id="3" stage="2" lat="2">
<core>AXI4Stream</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="17" bw="0" op_0_bw="0" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_1:5  call void @_ssdm_op_Write.axis.volatile.i64P(i64* %res_output_V, i64 %res_digits_data_V_lo)

]]></Node>
<StgValue><ssdm name="write_ln428"/></StgValue>
</operation>
</state>

<state id="4" st_id="4">

<operation id="18" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="12" bw="32" op_0_bw="32" op_1_bw="0">
<![CDATA[
hls_label_1:0  %tmp_s = call i32 (...)* @_ssdm_op_SpecRegionBegin([12 x i8]* @p_str5)

]]></Node>
<StgValue><ssdm name="tmp_s"/></StgValue>
</operation>

<operation id="19" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="13" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
hls_label_1:1  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind

]]></Node>
<StgValue><ssdm name="specpipeline_ln427"/></StgValue>
</operation>

<operation id="20" st_id="4" stage="1" lat="2">
<core>AXI4Stream</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="17" bw="0" op_0_bw="0" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_1:5  call void @_ssdm_op_Write.axis.volatile.i64P(i64* %res_output_V, i64 %res_digits_data_V_lo)

]]></Node>
<StgValue><ssdm name="write_ln428"/></StgValue>
</operation>

<operation id="21" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="18" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32">
<![CDATA[
hls_label_1:6  %empty_95 = call i32 (...)* @_ssdm_op_SpecRegionEnd([12 x i8]* @p_str5, i32 %tmp_s)

]]></Node>
<StgValue><ssdm name="empty_95"/></StgValue>
</operation>

<operation id="22" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln425" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="19" bw="0" op_0_bw="0">
<![CDATA[
hls_label_1:7  br label %0

]]></Node>
<StgValue><ssdm name="br_ln425"/></StgValue>
</operation>
</state>

<state id="5" st_id="5">

<operation id="23" st_id="5" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="21" bw="0">
<![CDATA[
.exitStub:0  ret void

]]></Node>
<StgValue><ssdm name="ret_ln0"/></StgValue>
</operation>
</state>
</state_list>


<ports>
</ports>


<dataflows>
</dataflows>


</stg>
