<stg><name>mat_mul.3</name>


<trans_list>

<trans id="79" from="1" to="2">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="109" from="2" to="10">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="110" from="2" to="3">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="102" from="3" to="4">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="103" from="4" to="5">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="104" from="5" to="6">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="105" from="6" to="7">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="106" from="7" to="8">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="107" from="8" to="9">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="108" from="9" to="2">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="90" from="10" to="11">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="119" from="11" to="19">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="120" from="11" to="12">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="112" from="12" to="13">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="113" from="13" to="14">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="114" from="14" to="15">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="115" from="15" to="16">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="116" from="16" to="17">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="117" from="17" to="18">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="118" from="18" to="11">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>
</trans_list>



<state_list>

<state id="1" st_id="1">

<operation id="20" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="5" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
.lr.ph7:0 %empty = speclooptripcount i32 @_ssdm_op_SpecLoopTripCount, i64 0, i64 0, i64 0

]]></Node>
<StgValue><ssdm name="empty"/></StgValue>
</operation>

<operation id="21" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="6" bw="0" op_0_bw="0" op_1_bw="0">
<![CDATA[
.lr.ph7:1 %specloopname_ln66 = specloopname void @_ssdm_op_SpecLoopName, void @empty_2

]]></Node>
<StgValue><ssdm name="specloopname_ln66"/></StgValue>
</operation>

<operation id="22" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="7" bw="0" op_0_bw="0">
<![CDATA[
.lr.ph7:2 %br_ln70 = br void

]]></Node>
<StgValue><ssdm name="br_ln70"/></StgValue>
</operation>
</state>

<state id="2" st_id="2">

<operation id="23" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="9" bw="4" op_0_bw="4" op_1_bw="0" op_2_bw="4" op_3_bw="0">
<![CDATA[
:0 %j_0 = phi i4 %add_ln70, void %.split.0, i4 0, void %.lr.ph7

]]></Node>
<StgValue><ssdm name="j_0"/></StgValue>
</operation>

<operation id="24" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="10" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32" op_3_bw="0">
<![CDATA[
:1 %sum_0 = phi i32 %tmp, void %.split.0, i32 0, void %.lr.ph7

]]></Node>
<StgValue><ssdm name="sum_0"/></StgValue>
</operation>

<operation id="25" st_id="2" stage="1" lat="1">
<core>Adder</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="11" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
:2 %add_ln70 = add i4 %j_0, i4 1

]]></Node>
<StgValue><ssdm name="add_ln70"/></StgValue>
</operation>

<operation id="26" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="12" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
:3 %specpipeline_ln0 = specpipeline void @_ssdm_op_SpecPipeline, i32 4294967295, i32 0, i32 1, i32 0, void @p_str

]]></Node>
<StgValue><ssdm name="specpipeline_ln0"/></StgValue>
</operation>

<operation id="27" st_id="2" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="13" bw="1" op_0_bw="4" op_1_bw="4">
<![CDATA[
:4 %icmp_ln70 = icmp_eq  i4 %j_0, i4 8

]]></Node>
<StgValue><ssdm name="icmp_ln70"/></StgValue>
</operation>

<operation id="28" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="14" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
:5 %empty_85 = speclooptripcount i32 @_ssdm_op_SpecLoopTripCount, i64 8, i64 8, i64 8

]]></Node>
<StgValue><ssdm name="empty_85"/></StgValue>
</operation>

<operation id="29" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="15" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
:6 %br_ln70 = br i1 %icmp_ln70, void %.split.0, void %._crit_edge.loopexit.0

]]></Node>
<StgValue><ssdm name="br_ln70"/></StgValue>
</operation>

<operation id="30" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="17" bw="64" op_0_bw="4">
<![CDATA[
.split.0:0 %j_0_cast = zext i4 %j_0

]]></Node>
<StgValue><ssdm name="j_0_cast"/></StgValue>
</operation>

<operation id="31" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="19" bw="4" op_0_bw="32" op_1_bw="64" op_2_bw="64">
<![CDATA[
.split.0:2 %layer10_weights_addr = getelementptr i32 %layer10_weights, i64 0, i64 %j_0_cast

]]></Node>
<StgValue><ssdm name="layer10_weights_addr"/></StgValue>
</operation>

<operation id="32" st_id="2" stage="2" lat="2">
<core>ROM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="20" bw="32" op_0_bw="4">
<![CDATA[
.split.0:3 %layer10_weights_load = load i4 %layer10_weights_addr

]]></Node>
<StgValue><ssdm name="layer10_weights_load"/></StgValue>
</operation>

<operation id="33" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="21" bw="11" op_0_bw="32" op_1_bw="64" op_2_bw="64">
<![CDATA[
.split.0:4 %input_addr = getelementptr i32 %input_r, i64 0, i64 %j_0_cast

]]></Node>
<StgValue><ssdm name="input_addr"/></StgValue>
</operation>

<operation id="34" st_id="2" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="22" bw="32" op_0_bw="11">
<![CDATA[
.split.0:5 %input_load = load i11 %input_addr

]]></Node>
<StgValue><ssdm name="input_load"/></StgValue>
</operation>
</state>

<state id="3" st_id="3">

<operation id="35" st_id="3" stage="1" lat="2">
<core>ROM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="20" bw="32" op_0_bw="4">
<![CDATA[
.split.0:3 %layer10_weights_load = load i4 %layer10_weights_addr

]]></Node>
<StgValue><ssdm name="layer10_weights_load"/></StgValue>
</operation>

<operation id="36" st_id="3" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="22" bw="32" op_0_bw="11">
<![CDATA[
.split.0:5 %input_load = load i11 %input_addr

]]></Node>
<StgValue><ssdm name="input_load"/></StgValue>
</operation>

<operation id="37" st_id="3" stage="4" lat="4">
<core>FMul_maxdsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="23" bw="32" op_0_bw="32" op_1_bw="32">
<![CDATA[
.split.0:6 %mul4 = fmul i32 %layer10_weights_load, i32 %input_load

]]></Node>
<StgValue><ssdm name="mul4"/></StgValue>
</operation>
</state>

<state id="4" st_id="4">

<operation id="38" st_id="4" stage="3" lat="4">
<core>FMul_maxdsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="23" bw="32" op_0_bw="32" op_1_bw="32">
<![CDATA[
.split.0:6 %mul4 = fmul i32 %layer10_weights_load, i32 %input_load

]]></Node>
<StgValue><ssdm name="mul4"/></StgValue>
</operation>
</state>

<state id="5" st_id="5">

<operation id="39" st_id="5" stage="2" lat="4">
<core>FMul_maxdsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="23" bw="32" op_0_bw="32" op_1_bw="32">
<![CDATA[
.split.0:6 %mul4 = fmul i32 %layer10_weights_load, i32 %input_load

]]></Node>
<StgValue><ssdm name="mul4"/></StgValue>
</operation>
</state>

<state id="6" st_id="6">

<operation id="40" st_id="6" stage="1" lat="4">
<core>FMul_maxdsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="23" bw="32" op_0_bw="32" op_1_bw="32">
<![CDATA[
.split.0:6 %mul4 = fmul i32 %layer10_weights_load, i32 %input_load

]]></Node>
<StgValue><ssdm name="mul4"/></StgValue>
</operation>
</state>

<state id="7" st_id="7">

<operation id="41" st_id="7" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="24" bw="1" op_0_bw="4" op_1_bw="4">
<![CDATA[
.split.0:7 %icmp_ln72 = icmp_eq  i4 %add_ln70, i4 8

]]></Node>
<StgValue><ssdm name="icmp_ln72"/></StgValue>
</operation>

<operation id="42" st_id="7" stage="3" lat="3">
<core>FAcc_nodsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="25" bw="32" op_0_bw="32" op_1_bw="32" op_2_bw="1">
<![CDATA[
.split.0:8 %tmp = facc i32 @_ssdm_op_FACC, i32 %mul4, i1 %icmp_ln72

]]></Node>
<StgValue><ssdm name="tmp"/></StgValue>
</operation>
</state>

<state id="8" st_id="8">

<operation id="43" st_id="8" stage="2" lat="3">
<core>FAcc_nodsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="25" bw="32" op_0_bw="32" op_1_bw="32" op_2_bw="1">
<![CDATA[
.split.0:8 %tmp = facc i32 @_ssdm_op_FACC, i32 %mul4, i1 %icmp_ln72

]]></Node>
<StgValue><ssdm name="tmp"/></StgValue>
</operation>
</state>

<state id="9" st_id="9">

<operation id="44" st_id="9" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="18" bw="0" op_0_bw="0" op_1_bw="0">
<![CDATA[
.split.0:1 %specloopname_ln65 = specloopname void @_ssdm_op_SpecLoopName, void @empty

]]></Node>
<StgValue><ssdm name="specloopname_ln65"/></StgValue>
</operation>

<operation id="45" st_id="9" stage="1" lat="3">
<core>FAcc_nodsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="25" bw="32" op_0_bw="32" op_1_bw="32" op_2_bw="1">
<![CDATA[
.split.0:8 %tmp = facc i32 @_ssdm_op_FACC, i32 %mul4, i1 %icmp_ln72

]]></Node>
<StgValue><ssdm name="tmp"/></StgValue>
</operation>

<operation id="46" st_id="9" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="26" bw="0" op_0_bw="0">
<![CDATA[
.split.0:9 %br_ln0 = br void

]]></Node>
<StgValue><ssdm name="br_ln0"/></StgValue>
</operation>
</state>

<state id="10" st_id="10">

<operation id="47" st_id="10" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="28" bw="11" op_0_bw="32" op_1_bw="64" op_2_bw="64">
<![CDATA[
._crit_edge.loopexit.0:0 %output_addr = getelementptr i32 %output_r, i64 0, i64 0

]]></Node>
<StgValue><ssdm name="output_addr"/></StgValue>
</operation>

<operation id="48" st_id="10" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="29" bw="0" op_0_bw="32" op_1_bw="11">
<![CDATA[
._crit_edge.loopexit.0:1 %store_ln74 = store i32 %sum_0, i11 %output_addr

]]></Node>
<StgValue><ssdm name="store_ln74"/></StgValue>
</operation>

<operation id="49" st_id="10" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="30" bw="0" op_0_bw="0">
<![CDATA[
._crit_edge.loopexit.0:2 %br_ln70 = br void

]]></Node>
<StgValue><ssdm name="br_ln70"/></StgValue>
</operation>
</state>

<state id="11" st_id="11">

<operation id="50" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="32" bw="4" op_0_bw="4" op_1_bw="0" op_2_bw="4" op_3_bw="0">
<![CDATA[
:0 %j_1 = phi i4 %add_ln70_1, void %.split.1, i4 0, void %._crit_edge.loopexit.0

]]></Node>
<StgValue><ssdm name="j_1"/></StgValue>
</operation>

<operation id="51" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="33" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32" op_3_bw="0">
<![CDATA[
:1 %sum_19 = phi i32 %tmp_2, void %.split.1, i32 0, void %._crit_edge.loopexit.0

]]></Node>
<StgValue><ssdm name="sum_19"/></StgValue>
</operation>

<operation id="52" st_id="11" stage="1" lat="1">
<core>Adder</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="34" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
:2 %add_ln70_1 = add i4 %j_1, i4 1

]]></Node>
<StgValue><ssdm name="add_ln70_1"/></StgValue>
</operation>

<operation id="53" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="35" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
:3 %specpipeline_ln0 = specpipeline void @_ssdm_op_SpecPipeline, i32 4294967295, i32 0, i32 1, i32 0, void @p_str

]]></Node>
<StgValue><ssdm name="specpipeline_ln0"/></StgValue>
</operation>

<operation id="54" st_id="11" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="36" bw="1" op_0_bw="4" op_1_bw="4">
<![CDATA[
:4 %icmp_ln70_1 = icmp_eq  i4 %j_1, i4 8

]]></Node>
<StgValue><ssdm name="icmp_ln70_1"/></StgValue>
</operation>

<operation id="55" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="37" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
:5 %empty_86 = speclooptripcount i32 @_ssdm_op_SpecLoopTripCount, i64 8, i64 8, i64 8

]]></Node>
<StgValue><ssdm name="empty_86"/></StgValue>
</operation>

<operation id="56" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="38" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
:6 %br_ln70 = br i1 %icmp_ln70_1, void %.split.1, void %._crit_edge.loopexit.1

]]></Node>
<StgValue><ssdm name="br_ln70"/></StgValue>
</operation>

<operation id="57" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="40" bw="64" op_0_bw="4">
<![CDATA[
.split.1:0 %j_1_cast = zext i4 %j_1

]]></Node>
<StgValue><ssdm name="j_1_cast"/></StgValue>
</operation>

<operation id="58" st_id="11" stage="1" lat="1">
<core>LogicGate</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="42" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
.split.1:2 %xor_ln72 = xor i4 %j_1, i4 8

]]></Node>
<StgValue><ssdm name="xor_ln72"/></StgValue>
</operation>

<operation id="59" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="43" bw="64" op_0_bw="4">
<![CDATA[
.split.1:3 %zext_ln72 = zext i4 %xor_ln72

]]></Node>
<StgValue><ssdm name="zext_ln72"/></StgValue>
</operation>

<operation id="60" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="44" bw="4" op_0_bw="32" op_1_bw="64" op_2_bw="64">
<![CDATA[
.split.1:4 %layer10_weights_addr_1 = getelementptr i32 %layer10_weights, i64 0, i64 %zext_ln72

]]></Node>
<StgValue><ssdm name="layer10_weights_addr_1"/></StgValue>
</operation>

<operation id="61" st_id="11" stage="2" lat="2">
<core>ROM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="45" bw="32" op_0_bw="4">
<![CDATA[
.split.1:5 %layer10_weights_load_1 = load i4 %layer10_weights_addr_1

]]></Node>
<StgValue><ssdm name="layer10_weights_load_1"/></StgValue>
</operation>

<operation id="62" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="46" bw="11" op_0_bw="32" op_1_bw="64" op_2_bw="64">
<![CDATA[
.split.1:6 %input_addr_1 = getelementptr i32 %input_r, i64 0, i64 %j_1_cast

]]></Node>
<StgValue><ssdm name="input_addr_1"/></StgValue>
</operation>

<operation id="63" st_id="11" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="47" bw="32" op_0_bw="11">
<![CDATA[
.split.1:7 %input_load_1 = load i11 %input_addr_1

]]></Node>
<StgValue><ssdm name="input_load_1"/></StgValue>
</operation>
</state>

<state id="12" st_id="12">

<operation id="64" st_id="12" stage="1" lat="2">
<core>ROM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="45" bw="32" op_0_bw="4">
<![CDATA[
.split.1:5 %layer10_weights_load_1 = load i4 %layer10_weights_addr_1

]]></Node>
<StgValue><ssdm name="layer10_weights_load_1"/></StgValue>
</operation>

<operation id="65" st_id="12" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="47" bw="32" op_0_bw="11">
<![CDATA[
.split.1:7 %input_load_1 = load i11 %input_addr_1

]]></Node>
<StgValue><ssdm name="input_load_1"/></StgValue>
</operation>

<operation id="66" st_id="12" stage="4" lat="4">
<core>FMul_maxdsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="48" bw="32" op_0_bw="32" op_1_bw="32">
<![CDATA[
.split.1:8 %mul4_1 = fmul i32 %layer10_weights_load_1, i32 %input_load_1

]]></Node>
<StgValue><ssdm name="mul4_1"/></StgValue>
</operation>
</state>

<state id="13" st_id="13">

<operation id="67" st_id="13" stage="3" lat="4">
<core>FMul_maxdsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="48" bw="32" op_0_bw="32" op_1_bw="32">
<![CDATA[
.split.1:8 %mul4_1 = fmul i32 %layer10_weights_load_1, i32 %input_load_1

]]></Node>
<StgValue><ssdm name="mul4_1"/></StgValue>
</operation>
</state>

<state id="14" st_id="14">

<operation id="68" st_id="14" stage="2" lat="4">
<core>FMul_maxdsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="48" bw="32" op_0_bw="32" op_1_bw="32">
<![CDATA[
.split.1:8 %mul4_1 = fmul i32 %layer10_weights_load_1, i32 %input_load_1

]]></Node>
<StgValue><ssdm name="mul4_1"/></StgValue>
</operation>
</state>

<state id="15" st_id="15">

<operation id="69" st_id="15" stage="1" lat="4">
<core>FMul_maxdsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="48" bw="32" op_0_bw="32" op_1_bw="32">
<![CDATA[
.split.1:8 %mul4_1 = fmul i32 %layer10_weights_load_1, i32 %input_load_1

]]></Node>
<StgValue><ssdm name="mul4_1"/></StgValue>
</operation>
</state>

<state id="16" st_id="16">

<operation id="70" st_id="16" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="49" bw="1" op_0_bw="4" op_1_bw="4">
<![CDATA[
.split.1:9 %icmp_ln72_1 = icmp_eq  i4 %add_ln70_1, i4 8

]]></Node>
<StgValue><ssdm name="icmp_ln72_1"/></StgValue>
</operation>

<operation id="71" st_id="16" stage="3" lat="3">
<core>FAcc_nodsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="50" bw="32" op_0_bw="32" op_1_bw="32" op_2_bw="1">
<![CDATA[
.split.1:10 %tmp_2 = facc i32 @_ssdm_op_FACC, i32 %mul4_1, i1 %icmp_ln72_1

]]></Node>
<StgValue><ssdm name="tmp_2"/></StgValue>
</operation>
</state>

<state id="17" st_id="17">

<operation id="72" st_id="17" stage="2" lat="3">
<core>FAcc_nodsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="50" bw="32" op_0_bw="32" op_1_bw="32" op_2_bw="1">
<![CDATA[
.split.1:10 %tmp_2 = facc i32 @_ssdm_op_FACC, i32 %mul4_1, i1 %icmp_ln72_1

]]></Node>
<StgValue><ssdm name="tmp_2"/></StgValue>
</operation>
</state>

<state id="18" st_id="18">

<operation id="73" st_id="18" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="41" bw="0" op_0_bw="0" op_1_bw="0">
<![CDATA[
.split.1:1 %specloopname_ln65 = specloopname void @_ssdm_op_SpecLoopName, void @empty

]]></Node>
<StgValue><ssdm name="specloopname_ln65"/></StgValue>
</operation>

<operation id="74" st_id="18" stage="1" lat="3">
<core>FAcc_nodsp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="50" bw="32" op_0_bw="32" op_1_bw="32" op_2_bw="1">
<![CDATA[
.split.1:10 %tmp_2 = facc i32 @_ssdm_op_FACC, i32 %mul4_1, i1 %icmp_ln72_1

]]></Node>
<StgValue><ssdm name="tmp_2"/></StgValue>
</operation>

<operation id="75" st_id="18" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="51" bw="0" op_0_bw="0">
<![CDATA[
.split.1:11 %br_ln0 = br void

]]></Node>
<StgValue><ssdm name="br_ln0"/></StgValue>
</operation>
</state>

<state id="19" st_id="19">

<operation id="76" st_id="19" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="53" bw="11" op_0_bw="32" op_1_bw="64" op_2_bw="64">
<![CDATA[
._crit_edge.loopexit.1:0 %output_addr_2 = getelementptr i32 %output_r, i64 0, i64 1

]]></Node>
<StgValue><ssdm name="output_addr_2"/></StgValue>
</operation>

<operation id="77" st_id="19" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="54" bw="0" op_0_bw="32" op_1_bw="11">
<![CDATA[
._crit_edge.loopexit.1:1 %store_ln74 = store i32 %sum_19, i11 %output_addr_2

]]></Node>
<StgValue><ssdm name="store_ln74"/></StgValue>
</operation>

<operation id="78" st_id="19" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="55" bw="0">
<![CDATA[
._crit_edge.loopexit.1:2 %ret_ln76 = ret

]]></Node>
<StgValue><ssdm name="ret_ln76"/></StgValue>
</operation>
</state>
</state_list>


<ports>
<port id="121" name="input_r" dir="0" iftype="1">
<core>RAM</core><StgValue><ssdm name="input_r"/><MemPortTyVec>1 3 </MemPortTyVec>
</StgValue>
</port>
<port id="122" name="output_r" dir="1" iftype="1">
<core>RAM</core><StgValue><ssdm name="output_r"/><MemPortTyVec>0 3 </MemPortTyVec>
</StgValue>
</port>
<port id="123" name="layer10_weights" dir="0" iftype="1">
<core>ROM</core><StgValue><ssdm name="layer10_weights"/><MemPortTyVec>1 </MemPortTyVec>
</StgValue>
</port>
</ports>


<dataflows>
<dataflow id="125" from="_ssdm_op_SpecLoopTripCount" to="empty" fromId="124" toId="20">
</dataflow>
<dataflow id="127" from="StgValue_126" to="empty" fromId="126" toId="20">
</dataflow>
<dataflow id="128" from="StgValue_126" to="empty" fromId="126" toId="20">
</dataflow>
<dataflow id="129" from="StgValue_126" to="empty" fromId="126" toId="20">
</dataflow>
<dataflow id="131" from="_ssdm_op_SpecLoopName" to="specloopname_ln66" fromId="130" toId="21">
</dataflow>
<dataflow id="133" from="empty_2" to="specloopname_ln66" fromId="132" toId="21">
</dataflow>
<dataflow id="134" from="add_ln70" to="j_0" fromId="25" toId="23">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="135" from="br_ln0" to="j_0" fromId="46" toId="23">
<BackEdge/>
</dataflow>
<dataflow id="137" from="StgValue_136" to="j_0" fromId="136" toId="23">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="138" from="br_ln70" to="j_0" fromId="22" toId="23">
</dataflow>
<dataflow id="139" from="tmp" to="sum_0" fromId="45" toId="24">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="140" from="br_ln0" to="sum_0" fromId="46" toId="24">
<BackEdge/>
</dataflow>
<dataflow id="142" from="StgValue_141" to="sum_0" fromId="141" toId="24">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="143" from="br_ln70" to="sum_0" fromId="22" toId="24">
</dataflow>
<dataflow id="144" from="j_0" to="add_ln70" fromId="23" toId="25">
</dataflow>
<dataflow id="146" from="StgValue_145" to="add_ln70" fromId="145" toId="25">
</dataflow>
<dataflow id="148" from="_ssdm_op_SpecPipeline" to="specpipeline_ln0" fromId="147" toId="26">
</dataflow>
<dataflow id="150" from="StgValue_149" to="specpipeline_ln0" fromId="149" toId="26">
</dataflow>
<dataflow id="152" from="StgValue_151" to="specpipeline_ln0" fromId="151" toId="26">
</dataflow>
<dataflow id="154" from="StgValue_153" to="specpipeline_ln0" fromId="153" toId="26">
</dataflow>
<dataflow id="155" from="StgValue_151" to="specpipeline_ln0" fromId="151" toId="26">
</dataflow>
<dataflow id="157" from="p_str" to="specpipeline_ln0" fromId="156" toId="26">
</dataflow>
<dataflow id="158" from="j_0" to="icmp_ln70" fromId="23" toId="27">
</dataflow>
<dataflow id="160" from="StgValue_159" to="icmp_ln70" fromId="159" toId="27">
</dataflow>
<dataflow id="161" from="_ssdm_op_SpecLoopTripCount" to="empty_85" fromId="124" toId="28">
</dataflow>
<dataflow id="163" from="StgValue_162" to="empty_85" fromId="162" toId="28">
</dataflow>
<dataflow id="164" from="StgValue_162" to="empty_85" fromId="162" toId="28">
</dataflow>
<dataflow id="165" from="StgValue_162" to="empty_85" fromId="162" toId="28">
</dataflow>
<dataflow id="166" from="icmp_ln70" to="br_ln70" fromId="27" toId="29">
</dataflow>
<dataflow id="167" from="j_0" to="j_0_cast" fromId="23" toId="30">
</dataflow>
<dataflow id="168" from="layer10_weights" to="layer10_weights_addr" fromId="123" toId="31">
</dataflow>
<dataflow id="169" from="StgValue_126" to="layer10_weights_addr" fromId="126" toId="31">
</dataflow>
<dataflow id="170" from="j_0_cast" to="layer10_weights_addr" fromId="30" toId="31">
</dataflow>
<dataflow id="171" from="layer10_weights_addr" to="layer10_weights_load" fromId="31" toId="32">
</dataflow>
<dataflow id="172" from="input_r" to="input_addr" fromId="121" toId="33">
</dataflow>
<dataflow id="173" from="StgValue_126" to="input_addr" fromId="126" toId="33">
</dataflow>
<dataflow id="174" from="j_0_cast" to="input_addr" fromId="30" toId="33">
</dataflow>
<dataflow id="175" from="input_addr" to="input_load" fromId="33" toId="34">
</dataflow>
<dataflow id="176" from="layer10_weights_addr" to="layer10_weights_load" fromId="31" toId="35">
</dataflow>
<dataflow id="177" from="input_addr" to="input_load" fromId="33" toId="36">
</dataflow>
<dataflow id="178" from="layer10_weights_load" to="mul4" fromId="35" toId="37">
</dataflow>
<dataflow id="179" from="input_load" to="mul4" fromId="36" toId="37">
</dataflow>
<dataflow id="180" from="layer10_weights_load" to="mul4" fromId="35" toId="38">
</dataflow>
<dataflow id="181" from="input_load" to="mul4" fromId="36" toId="38">
</dataflow>
<dataflow id="182" from="layer10_weights_load" to="mul4" fromId="35" toId="39">
</dataflow>
<dataflow id="183" from="input_load" to="mul4" fromId="36" toId="39">
</dataflow>
<dataflow id="184" from="layer10_weights_load" to="mul4" fromId="35" toId="40">
</dataflow>
<dataflow id="185" from="input_load" to="mul4" fromId="36" toId="40">
</dataflow>
<dataflow id="186" from="add_ln70" to="icmp_ln72" fromId="25" toId="41">
</dataflow>
<dataflow id="187" from="StgValue_159" to="icmp_ln72" fromId="159" toId="41">
</dataflow>
<dataflow id="189" from="_ssdm_op_FACC" to="tmp" fromId="188" toId="42">
</dataflow>
<dataflow id="190" from="mul4" to="tmp" fromId="40" toId="42">
</dataflow>
<dataflow id="191" from="icmp_ln72" to="tmp" fromId="41" toId="42">
</dataflow>
<dataflow id="192" from="_ssdm_op_FACC" to="tmp" fromId="188" toId="43">
</dataflow>
<dataflow id="193" from="mul4" to="tmp" fromId="40" toId="43">
</dataflow>
<dataflow id="194" from="icmp_ln72" to="tmp" fromId="41" toId="43">
</dataflow>
<dataflow id="195" from="_ssdm_op_SpecLoopName" to="specloopname_ln65" fromId="130" toId="44">
</dataflow>
<dataflow id="197" from="empty" to="specloopname_ln65" fromId="196" toId="44">
</dataflow>
<dataflow id="198" from="_ssdm_op_FACC" to="tmp" fromId="188" toId="45">
</dataflow>
<dataflow id="199" from="mul4" to="tmp" fromId="40" toId="45">
</dataflow>
<dataflow id="200" from="icmp_ln72" to="tmp" fromId="41" toId="45">
</dataflow>
<dataflow id="201" from="output_r" to="output_addr" fromId="122" toId="47">
</dataflow>
<dataflow id="202" from="StgValue_126" to="output_addr" fromId="126" toId="47">
</dataflow>
<dataflow id="203" from="StgValue_126" to="output_addr" fromId="126" toId="47">
</dataflow>
<dataflow id="204" from="sum_0" to="store_ln74" fromId="24" toId="48">
</dataflow>
<dataflow id="205" from="output_addr" to="store_ln74" fromId="47" toId="48">
</dataflow>
<dataflow id="206" from="add_ln70_1" to="j_1" fromId="52" toId="50">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="207" from="br_ln0" to="j_1" fromId="75" toId="50">
<BackEdge/>
</dataflow>
<dataflow id="208" from="StgValue_136" to="j_1" fromId="136" toId="50">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="209" from="br_ln70" to="j_1" fromId="49" toId="50">
</dataflow>
<dataflow id="210" from="tmp_2" to="sum_19" fromId="74" toId="51">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln70_1" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="211" from="br_ln0" to="sum_19" fromId="75" toId="51">
<BackEdge/>
</dataflow>
<dataflow id="212" from="StgValue_141" to="sum_19" fromId="141" toId="51">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="213" from="br_ln70" to="sum_19" fromId="49" toId="51">
</dataflow>
<dataflow id="214" from="j_1" to="add_ln70_1" fromId="50" toId="52">
</dataflow>
<dataflow id="215" from="StgValue_145" to="add_ln70_1" fromId="145" toId="52">
</dataflow>
<dataflow id="216" from="_ssdm_op_SpecPipeline" to="specpipeline_ln0" fromId="147" toId="53">
</dataflow>
<dataflow id="217" from="StgValue_149" to="specpipeline_ln0" fromId="149" toId="53">
</dataflow>
<dataflow id="218" from="StgValue_151" to="specpipeline_ln0" fromId="151" toId="53">
</dataflow>
<dataflow id="219" from="StgValue_153" to="specpipeline_ln0" fromId="153" toId="53">
</dataflow>
<dataflow id="220" from="StgValue_151" to="specpipeline_ln0" fromId="151" toId="53">
</dataflow>
<dataflow id="221" from="p_str" to="specpipeline_ln0" fromId="156" toId="53">
</dataflow>
<dataflow id="222" from="j_1" to="icmp_ln70_1" fromId="50" toId="54">
</dataflow>
<dataflow id="223" from="StgValue_159" to="icmp_ln70_1" fromId="159" toId="54">
</dataflow>
<dataflow id="224" from="_ssdm_op_SpecLoopTripCount" to="empty_86" fromId="124" toId="55">
</dataflow>
<dataflow id="225" from="StgValue_162" to="empty_86" fromId="162" toId="55">
</dataflow>
<dataflow id="226" from="StgValue_162" to="empty_86" fromId="162" toId="55">
</dataflow>
<dataflow id="227" from="StgValue_162" to="empty_86" fromId="162" toId="55">
</dataflow>
<dataflow id="228" from="icmp_ln70_1" to="br_ln70" fromId="54" toId="56">
</dataflow>
<dataflow id="229" from="j_1" to="j_1_cast" fromId="50" toId="57">
</dataflow>
<dataflow id="230" from="j_1" to="xor_ln72" fromId="50" toId="58">
</dataflow>
<dataflow id="231" from="StgValue_159" to="xor_ln72" fromId="159" toId="58">
</dataflow>
<dataflow id="232" from="xor_ln72" to="zext_ln72" fromId="58" toId="59">
</dataflow>
<dataflow id="233" from="layer10_weights" to="layer10_weights_addr_1" fromId="123" toId="60">
</dataflow>
<dataflow id="234" from="StgValue_126" to="layer10_weights_addr_1" fromId="126" toId="60">
</dataflow>
<dataflow id="235" from="zext_ln72" to="layer10_weights_addr_1" fromId="59" toId="60">
</dataflow>
<dataflow id="236" from="layer10_weights_addr_1" to="layer10_weights_load_1" fromId="60" toId="61">
</dataflow>
<dataflow id="237" from="input_r" to="input_addr_1" fromId="121" toId="62">
</dataflow>
<dataflow id="238" from="StgValue_126" to="input_addr_1" fromId="126" toId="62">
</dataflow>
<dataflow id="239" from="j_1_cast" to="input_addr_1" fromId="57" toId="62">
</dataflow>
<dataflow id="240" from="input_addr_1" to="input_load_1" fromId="62" toId="63">
</dataflow>
<dataflow id="241" from="layer10_weights_addr_1" to="layer10_weights_load_1" fromId="60" toId="64">
</dataflow>
<dataflow id="242" from="input_addr_1" to="input_load_1" fromId="62" toId="65">
</dataflow>
<dataflow id="243" from="layer10_weights_load_1" to="mul4_1" fromId="64" toId="66">
</dataflow>
<dataflow id="244" from="input_load_1" to="mul4_1" fromId="65" toId="66">
</dataflow>
<dataflow id="245" from="layer10_weights_load_1" to="mul4_1" fromId="64" toId="67">
</dataflow>
<dataflow id="246" from="input_load_1" to="mul4_1" fromId="65" toId="67">
</dataflow>
<dataflow id="247" from="layer10_weights_load_1" to="mul4_1" fromId="64" toId="68">
</dataflow>
<dataflow id="248" from="input_load_1" to="mul4_1" fromId="65" toId="68">
</dataflow>
<dataflow id="249" from="layer10_weights_load_1" to="mul4_1" fromId="64" toId="69">
</dataflow>
<dataflow id="250" from="input_load_1" to="mul4_1" fromId="65" toId="69">
</dataflow>
<dataflow id="251" from="add_ln70_1" to="icmp_ln72_1" fromId="52" toId="70">
</dataflow>
<dataflow id="252" from="StgValue_159" to="icmp_ln72_1" fromId="159" toId="70">
</dataflow>
<dataflow id="253" from="_ssdm_op_FACC" to="tmp_2" fromId="188" toId="71">
</dataflow>
<dataflow id="254" from="mul4_1" to="tmp_2" fromId="69" toId="71">
</dataflow>
<dataflow id="255" from="icmp_ln72_1" to="tmp_2" fromId="70" toId="71">
</dataflow>
<dataflow id="256" from="_ssdm_op_FACC" to="tmp_2" fromId="188" toId="72">
</dataflow>
<dataflow id="257" from="mul4_1" to="tmp_2" fromId="69" toId="72">
</dataflow>
<dataflow id="258" from="icmp_ln72_1" to="tmp_2" fromId="70" toId="72">
</dataflow>
<dataflow id="259" from="_ssdm_op_SpecLoopName" to="specloopname_ln65" fromId="130" toId="73">
</dataflow>
<dataflow id="260" from="empty" to="specloopname_ln65" fromId="196" toId="73">
</dataflow>
<dataflow id="261" from="_ssdm_op_FACC" to="tmp_2" fromId="188" toId="74">
</dataflow>
<dataflow id="262" from="mul4_1" to="tmp_2" fromId="69" toId="74">
</dataflow>
<dataflow id="263" from="icmp_ln72_1" to="tmp_2" fromId="70" toId="74">
</dataflow>
<dataflow id="264" from="output_r" to="output_addr_2" fromId="122" toId="76">
</dataflow>
<dataflow id="265" from="StgValue_126" to="output_addr_2" fromId="126" toId="76">
</dataflow>
<dataflow id="267" from="StgValue_266" to="output_addr_2" fromId="266" toId="76">
</dataflow>
<dataflow id="268" from="sum_19" to="store_ln74" fromId="51" toId="77">
</dataflow>
<dataflow id="269" from="output_addr_2" to="store_ln74" fromId="76" toId="77">
</dataflow>
<dataflow id="270" from="icmp_ln70" to="StgValue_2" fromId="27" toId="2">
</dataflow>
<dataflow id="271" from="icmp_ln70" to="StgValue_3" fromId="27" toId="3">
</dataflow>
<dataflow id="272" from="icmp_ln70" to="StgValue_4" fromId="27" toId="4">
</dataflow>
<dataflow id="273" from="icmp_ln70" to="StgValue_5" fromId="27" toId="5">
</dataflow>
<dataflow id="274" from="icmp_ln70" to="StgValue_6" fromId="27" toId="6">
</dataflow>
<dataflow id="275" from="icmp_ln70" to="StgValue_7" fromId="27" toId="7">
</dataflow>
<dataflow id="276" from="icmp_ln70" to="StgValue_8" fromId="27" toId="8">
</dataflow>
<dataflow id="277" from="icmp_ln70" to="StgValue_9" fromId="27" toId="9">
</dataflow>
<dataflow id="278" from="icmp_ln70_1" to="StgValue_11" fromId="54" toId="11">
</dataflow>
<dataflow id="279" from="icmp_ln70_1" to="StgValue_12" fromId="54" toId="12">
</dataflow>
<dataflow id="280" from="icmp_ln70_1" to="StgValue_13" fromId="54" toId="13">
</dataflow>
<dataflow id="281" from="icmp_ln70_1" to="StgValue_14" fromId="54" toId="14">
</dataflow>
<dataflow id="282" from="icmp_ln70_1" to="StgValue_15" fromId="54" toId="15">
</dataflow>
<dataflow id="283" from="icmp_ln70_1" to="StgValue_16" fromId="54" toId="16">
</dataflow>
<dataflow id="284" from="icmp_ln70_1" to="StgValue_17" fromId="54" toId="17">
</dataflow>
<dataflow id="285" from="icmp_ln70_1" to="StgValue_18" fromId="54" toId="18">
</dataflow>
</dataflows>


</stg>
